The stm32 specs indicate that the SPE bit must be cleared before
changing the CPHA or CPOL bits.
Reported by @cbc02009 and @bigtreetech.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
It's possible for the SCLK pin to still be updating even after the
last byte of data has been read from the receive pin. (In particular
in spi mode 0 and 1.) Exiting early from spi_transfer() in this case
could result in the CS pin being raised before the final updates to
SCLK pin.
Add an additional wait at the end of spi_transfer() to avoid this
issue.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Unify the handling of the enable_pclock() and is_enabled_pclock() code
across all stm32 chips. All chips will now perform a peripheral reset
on enable_pclock() (this is a change for stm32f0 and stm32h7). The
enable_pclock() code will now also disable irqs during the enable.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Avoid read-modify-write operations where possible. The register
values are in a known state so prefer absolute writes.
Improve handling of race conditions with hardware updates.
Remove the adc reference from "struct gpio_adc" as it is a constant.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Use a fixed layout for the USB transfer memory and remove the ep_mem
struct definition.
This is in preparation for stm32g0 support.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The gpio_peripheral() code is the same in stm32f0.c, stm32f4.c, and
stm32h7.c. Move that function to a new gpioperiph.c file to avoid
code duplication.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Don't go above 400Mhz as otherwise it causes 32bit rollover issues.
(Parts of the code expect a rollover will not occur faster than 10
seconds.)
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Add an optimized step function for drivers that support stepping on
both rising and falling edges of the step pin. Enable this
optimization on 32bit ARM micro-controllers. Automatically detect
this capability in the host code and enable on TMC drivers running in
SPI/UART mode.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The floating point unit must be enabled in order to use it and Klipper
does not currently implement that. Newer versions of gcc may spill
registers to the floating point unit causing failures.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The F042 and F072 chips are in the same series and the code should be
nearly identical for these chips. Implement the alias and enable USB
for the F072 chips.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The previous OSPEEDR value of 0x2 was copied from the stm32f4.c code,
but the stm32f0 interprets that value the same as 0x0 - which is "low"
speed. Change the OSPEEDR value to "medium" speed so that it matches
the configuration of stm32f1 chips.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This change has been expanded to include all STM32F4 processors, since they share a common TIMER mapping with some processors just not having all of the timers and pins.
Signed-off-by: Jerome Helbert <jerome@helbert.net>
This commit contains a configuration for the Anycubic Vyper printer from 2021.
It uses a clone of the STM32F103 chip named GD32F103.
There are 2 Mainboard versions out there v0.0.5 and v0.0.6, this config has
been tested with the v0.0.6 only. It should probably work for v0.0.5 as well
since there are no different changes in the Anycubic Marlin firmware.
The LCD is not supported yet (might work, but didn't try yet).
Signed-off-by: Marc Neuhaus <marc@neuhaus.nrw>
Signed-off-by: Manuel Fichtner <manuel.fichtner@me.com>
The F405, F407, and F429 chips are in the same series and almost all
code definitions should apply to all chips in that series. Implement
the alias and fix defintions in adc.c and Kconfig that were only
applying to a subset of that series.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor
BIGTREETECH
adelyser
Sergey1560
adelyser
Eric Callahan
jrhelbert
Manuel Fichtner
D4SK