Commit Graph

882 Commits

Author SHA1 Message Date
Alex Maclean 8049243221 atsam: Add support for SAM E70
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2022-03-26 11:59:27 -04:00
Blinker73 df79893dbc
linux: Update i2c.c (#5295)
Similarly to commit 8cf1b512 for SPI, the Rpi4 has more i2c busses to offer
This change allows klipper to use up to I2c bus 6
/boot/configtxt 
dtparam=i2c_arm=on
dtoverlay=i2c6

and 

pi@fluiddpi:~ $ ls -1 /dev/i2c*
/dev/i2c-1
/dev/i2c-6

Signed-off-by: Sylvain Dansereau <brutus_dansereau@hotmail.com>
2022-03-14 14:24:27 -04:00
Kevin O'Connor 7731c30422 stm32: Allow 32KiB bootloader to be specified for all STM32F4 builds
Reported by @GerogeFu.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2022-03-14 12:26:41 -04:00
Kevin O'Connor e3beafbdb4 stm32: Clarify CCIPR2 setting in stm32g0.c
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2022-03-11 14:12:11 -05:00
Kevin O'Connor 4ce2d379bb stm32: Simplify CCIPR2 register assignment on stm32g0
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2022-03-09 13:28:00 -05:00
BIGTREETECH d75154d695
stm32: USB clock source from PLLQCLK on stm32g0 (#5341)
Signed-off-by: Alan.Ma from BigTreeTech <tech@biqu3d.com>
2022-03-09 13:11:04 -05:00
Kevin O'Connor 7ce409d7a5 lpc176x: Fix serial ordering of initialization
The serial device needs to be enabled before setting the DLAB bit.
This prevented UART3 from working.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2022-03-01 12:55:06 -05:00
Kevin O'Connor e3cbe7ea36 stm32: Clear SPE flag on a change to SPI CR1 register
The stm32 specs indicate that the SPE bit must be cleared before
changing the CPHA or CPOL bits.

Reported by @cbc02009 and @bigtreetech.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2022-02-10 18:12:01 -05:00
Kevin O'Connor 99d55185a2 stm32: Wait for transmission to complete before returning from spi_transfer()
It's possible for the SCLK pin to still be updating even after the
last byte of data has been read from the receive pin.  (In particular
in spi mode 0 and 1.)  Exiting early from spi_transfer() in this case
could result in the CS pin being raised before the final updates to
SCLK pin.

Add an additional wait at the end of spi_transfer() to avoid this
issue.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2022-02-10 17:27:55 -05:00
adelyser 9174c0241e
stm32: Fix ADC on stm32h7 (#5239)
Don't reset the ADC peripheral if the clock is already enabled.
Fixes #5236

Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
2022-02-06 18:29:53 -05:00
Lasse Dalegaard a7b01857f5 flash_usb: use sudo for rp2040 flashing
The rp2040 can be flashed without sudo when using udev rules to give the
user permission, but in a standard configuration sudo is required.

Here we make it possible for flash_usb to use sudo for the rp2040
target, and make it the default when using `make flash` for the rp2040.
As for other targets, one can set `NOSUDO=1` to not call through sudo.

Signed-off-by: Lasse Dalegaard <dalegaard@gmail.com>
2022-01-31 11:10:02 -05:00
Sergey1560 fb6d6d381c
stm32: Add remap CAN to PD0/PD1 for stm32f103 (#5173)
Signed-off-by: Sergey Terentiev <sergey@terentiev.me>
2022-01-26 18:06:55 -05:00
Lasse Dalegaard 090fcf928f rp2040: implement I2C
This implements I2C for the rp2040 target. All output groupings of both
I2C blocks are available for use.

Signed-off-by: Lasse Dalegaard <dalegaard@gmail.com>
2022-01-12 11:44:31 -05:00
Kevin O'Connor 4c8d24ae03 stm32: Update Kconfig as CANBUS isn't available on stm32f401
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2022-01-07 22:17:26 -05:00
Lasse Dalegaard 7c0559c6e6 rp2040: add make flash support
This adds `make flash` support for the rp2040 target. Flashing is
performed using a custom `rp2040_flash` tool that uses the PICOBOOT
protocol. Root is not required.

The user specifies the serial device of the rp2040 they wish to flash as
the device. This device is reset into bootsel mode and `rp2040_flash`
is invoked on the original USB device path.

If the device is already in bootloader mode, the user can specify
'first' as `FLASH_DEVICE` which will simply invoke `rp2040_flash` with
no bus/address options.

Signed-off-by: Lasse Dalegaard <dalegaard@gmail.com>
2022-01-06 17:32:54 -05:00
Kevin O'Connor 8b6753d68f stm32: Unify enable_pclock() code
Unify the handling of the enable_pclock() and is_enabled_pclock() code
across all stm32 chips.  All chips will now perform a peripheral reset
on enable_pclock() (this is a change for stm32f0 and stm32h7).  The
enable_pclock() code will now also disable irqs during the enable.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-30 12:18:05 -05:00
adelyser 9bdd61758e
stm32: Fix the GPIO register for stm32h7 (#5077)
Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
2021-12-29 18:01:28 -05:00
Kevin O'Connor 247cd753e2 stm32: Fix ADC on stm32f042
It seems the stm32f042 chip needs a small delay during ADC enable.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-24 19:27:04 -05:00
Kevin O'Connor c89a01c83b stm32: Enable SPI support on stm32g0
Signed-off-by: Alan.Ma from BigTreeTech <tech@biqu3d.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:26 -05:00
Kevin O'Connor 1c24317380 stm32: Enable ADC support on stm32g0
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:26 -05:00
Kevin O'Connor 88325b6c93 stm32: Rework register access on stm32f0_adc.c
Avoid read-modify-write operations where possible.  The register
values are in a known state so prefer absolute writes.

Improve handling of race conditions with hardware updates.

Remove the adc reference from "struct gpio_adc" as it is a constant.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:26 -05:00
Kevin O'Connor 20ac48f680 stm32: Minor whitespace changes to stm32f0_adc.c
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:26 -05:00
Kevin O'Connor b710174107 stm32: Enable I2C on stm32g0
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:26 -05:00
Kevin O'Connor 9549a3b4fb stm32: Add support for USB on stm32g0
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:26 -05:00
Kevin O'Connor 8d7a6e4ca4 stm32: Rework USB transfer memory layout in usbfs.c
Use a fixed layout for the USB transfer memory and remove the ep_mem
struct definition.

This is in preparation for stm32g0 support.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:26 -05:00
Kevin O'Connor a4a02e86af stm32: Fix buffer size calculation in usbfs.c
When the buffers are over 32 bytes, a block count of 1 starts at 0.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor 7d2c966241 stm32: Simplify irq declaration in usbfs.c
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor 6e8f28117b stm32: Initial support for stm32g0
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor dc3ac2b424 stm32: Enable optimized gpio_clock_enable() function on stm32h7
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor e56b63fd7e stm32: Reorganize stm32h7.c into major code blocks
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor de35790709 stm32: Remove USB boot stubs from stm32h7.c
The USB dfu bootloader wasn't enabled on stm32h7, so remove the
copy-and-paste code stubs for it.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor 617f620f00 stm32: Fix DFU entry point on stm32f072
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor e14dca0f06 stm32: Reorganize usb bootloader code in stm32f0.c
Reorganize stm32f0.c into major code blocks.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor e55011cde8 stm32: Reorganize usb bootloader code in stm32f4.c
Reorganize stm32f4.c into major code blocks.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor d29f97cd99 stm32: Reorganize code in stm32f1.c
Reorganize stm32f1.c into major code blocks.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor 2ee1f48895 stm32: Add new gpioperiph.c file for gpio_peripheral() code
The gpio_peripheral() code is the same in stm32f0.c, stm32f4.c, and
stm32h7.c.  Move that function to a new gpioperiph.c file to avoid
code duplication.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-12-23 22:15:25 -05:00
Kevin O'Connor 2b7d0bba42 stm32: Add option to disable SWD on GigaDevice STM32F103 clones
Tested by @FotoFieber.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-11-25 10:15:58 -05:00
adelyser 4eeb4620cd stm32: Add USBOTG support to stm32h7
Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-11-21 08:12:32 -05:00
Kevin O'Connor 8b401382f6 stm32: Enable SPI on stm32h7
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-11-20 18:26:52 -05:00
adelyser 3ac354088a
stm32: Add stm32h7 SPI support (#4850)
Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
2021-11-20 18:23:23 -05:00
adelyser b480734c88 stm32: Add STM32H743 support
Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-11-20 18:11:02 -05:00
Kevin O'Connor 7b69ef0750 stm32: Limit stm32h7 chips to 400Mhz
Don't go above 400Mhz as otherwise it causes 32bit rollover issues.
(Parts of the code expect a rollover will not occur faster than 10
seconds.)

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-11-20 18:11:02 -05:00
Kevin O'Connor bb08dc7ae9 atsam: Add get_pclock_frequency() helper function
Add get_pclock_frequency() and use it to calculate peripheral clocks.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-11-20 13:52:16 -05:00
Alex Maclean 92ca111986 atsam: Fix I2C bitrate
Multiplying the desired bitrate by 4 results in half the
desired period and thus twice the desired bitrate.

Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2021-11-20 13:28:35 -05:00
Alex Maclean 01a223393e atsam: Don't enable USB FS clock on SAM3
This clock is only needed for low-power operation mode,
and wasn't correctly configured anyway (should be 48MHz).

Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2021-11-20 13:28:35 -05:00
Alex Maclean c55a94001f atsam: Don't bother disabling DMA for UART
PDC is not enabled by default so no need to disable it

Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2021-11-20 13:28:35 -05:00
Alex Maclean e2133a7301 atsam: Don't set unused bits in UART
The CHRL and NBSTOP bits are not present
in the UART peripheral, only the USART.

Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2021-11-20 13:28:35 -05:00
adelyser a5ec751406
stm32: Add UART4 to stm32h7 (#4848)
Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
2021-11-19 10:27:56 -05:00
Kevin O'Connor 59314d99e0 sched: Move last_insert check for improved gcc code layout
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2021-11-09 20:20:24 -05:00
Eric Callahan a0615e5e17 stm32f4: reset peripherals in enable_pcclock()
Reset peripherals to after enabling to clear stale
registers set by the bootloader.

Signed-off-by:  Eric Callahan <arksine.code@gmail.com>
2021-11-08 20:10:51 -05:00