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stm32f1: Fix for using 16MHz external crystal (#3814) 

Signed-off-by: Matt Shepcar <matt@shepcar.co.uk>
This commit is contained in:
Matt Shepcar 2021-01-24 15:24:11 +00:00 committed by GitHub
parent b32166c8a0
commit ccaf58a02c
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1 changed files with 7 additions and 2 deletions
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9
src/stm32/stm32f1.c
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@ -162,9 +162,14 @@ clock_setup(void)
uint32_t cfgr;
if (!CONFIG_STM32_CLOCK_REF_INTERNAL) {
// Configure 72Mhz PLL from external crystal (HSE)
uint32_t div = CONFIG_CLOCK_FREQ / CONFIG_CLOCK_REF_FREQ;
RCC->CR |= RCC_CR_HSEON;
cfgr = (1 << RCC_CFGR_PLLSRC_Pos) | ((div - 2) << RCC_CFGR_PLLMULL_Pos);
uint32_t div = CONFIG_CLOCK_FREQ / (CONFIG_CLOCK_REF_FREQ / 2);
cfgr = 1 << RCC_CFGR_PLLSRC_Pos;
if ((div & 1) && div <= 16)
cfgr |= RCC_CFGR_PLLXTPRE_HSE_DIV2;
else
div /= 2;
cfgr |= (div - 2) << RCC_CFGR_PLLMULL_Pos;
} else {
// Configure 72Mhz PLL from internal 8Mhz oscillator (HSI)
uint32_t div2 = (CONFIG_CLOCK_FREQ / 8000000) * 2;