mirror of https://github.com/Desuuuu/klipper.git
187 lines
12 KiB
C
187 lines
12 KiB
C
/**
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* \file
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*
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* \brief Component description for RTT
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*
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* Copyright (c) 2019 Microchip Technology Inc.
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*
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* \license_start
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*
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* \page License
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \license_stop
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*
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*/
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/* file generated from device description version 2019-01-18T21:19:59Z */
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#ifndef _SAME70_RTT_COMPONENT_H_
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#define _SAME70_RTT_COMPONENT_H_
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#define _SAME70_RTT_COMPONENT_ /**< \deprecated Backward compatibility for ASF */
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/** \addtogroup SAME_SAME70 Real-time Timer
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* @{
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*/
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/* ========================================================================== */
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/** SOFTWARE API DEFINITION FOR RTT */
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/* ========================================================================== */
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#ifndef COMPONENT_TYPEDEF_STYLE
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#define COMPONENT_TYPEDEF_STYLE 'R' /**< Defines default style of typedefs for the component header files ('R' = RFO, 'N' = NTO)*/
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#endif
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#define RTT_6081 /**< (RTT) Module ID */
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#define REV_RTT M /**< (RTT) Module revision */
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/* -------- RTT_MR : (RTT Offset: 0x00) (R/W 32) Mode Register -------- */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#if COMPONENT_TYPEDEF_STYLE == 'N'
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typedef union {
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struct {
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uint32_t RTPRES:16; /**< bit: 0..15 Real-time Timer Prescaler Value */
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uint32_t ALMIEN:1; /**< bit: 16 Alarm Interrupt Enable */
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uint32_t RTTINCIEN:1; /**< bit: 17 Real-time Timer Increment Interrupt Enable */
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uint32_t RTTRST:1; /**< bit: 18 Real-time Timer Restart */
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uint32_t :1; /**< bit: 19 Reserved */
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uint32_t RTTDIS:1; /**< bit: 20 Real-time Timer Disable */
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uint32_t :3; /**< bit: 21..23 Reserved */
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uint32_t RTC1HZ:1; /**< bit: 24 Real-Time Clock 1Hz Clock Selection */
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uint32_t :7; /**< bit: 25..31 Reserved */
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} bit; /**< Structure used for bit access */
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uint32_t reg; /**< Type used for register access */
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} RTT_MR_Type;
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#endif
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define RTT_MR_OFFSET (0x00) /**< (RTT_MR) Mode Register Offset */
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#define RTT_MR_RTPRES_Pos 0 /**< (RTT_MR) Real-time Timer Prescaler Value Position */
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#define RTT_MR_RTPRES_Msk (_U_(0xFFFF) << RTT_MR_RTPRES_Pos) /**< (RTT_MR) Real-time Timer Prescaler Value Mask */
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#define RTT_MR_RTPRES(value) (RTT_MR_RTPRES_Msk & ((value) << RTT_MR_RTPRES_Pos))
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#define RTT_MR_ALMIEN_Pos 16 /**< (RTT_MR) Alarm Interrupt Enable Position */
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#define RTT_MR_ALMIEN_Msk (_U_(0x1) << RTT_MR_ALMIEN_Pos) /**< (RTT_MR) Alarm Interrupt Enable Mask */
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#define RTT_MR_ALMIEN RTT_MR_ALMIEN_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_ALMIEN_Msk instead */
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#define RTT_MR_RTTINCIEN_Pos 17 /**< (RTT_MR) Real-time Timer Increment Interrupt Enable Position */
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#define RTT_MR_RTTINCIEN_Msk (_U_(0x1) << RTT_MR_RTTINCIEN_Pos) /**< (RTT_MR) Real-time Timer Increment Interrupt Enable Mask */
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#define RTT_MR_RTTINCIEN RTT_MR_RTTINCIEN_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_RTTINCIEN_Msk instead */
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#define RTT_MR_RTTRST_Pos 18 /**< (RTT_MR) Real-time Timer Restart Position */
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#define RTT_MR_RTTRST_Msk (_U_(0x1) << RTT_MR_RTTRST_Pos) /**< (RTT_MR) Real-time Timer Restart Mask */
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#define RTT_MR_RTTRST RTT_MR_RTTRST_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_RTTRST_Msk instead */
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#define RTT_MR_RTTDIS_Pos 20 /**< (RTT_MR) Real-time Timer Disable Position */
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#define RTT_MR_RTTDIS_Msk (_U_(0x1) << RTT_MR_RTTDIS_Pos) /**< (RTT_MR) Real-time Timer Disable Mask */
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#define RTT_MR_RTTDIS RTT_MR_RTTDIS_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_RTTDIS_Msk instead */
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#define RTT_MR_RTC1HZ_Pos 24 /**< (RTT_MR) Real-Time Clock 1Hz Clock Selection Position */
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#define RTT_MR_RTC1HZ_Msk (_U_(0x1) << RTT_MR_RTC1HZ_Pos) /**< (RTT_MR) Real-Time Clock 1Hz Clock Selection Mask */
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#define RTT_MR_RTC1HZ RTT_MR_RTC1HZ_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_MR_RTC1HZ_Msk instead */
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#define RTT_MR_MASK _U_(0x117FFFF) /**< \deprecated (RTT_MR) Register MASK (Use RTT_MR_Msk instead) */
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#define RTT_MR_Msk _U_(0x117FFFF) /**< (RTT_MR) Register Mask */
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/* -------- RTT_AR : (RTT Offset: 0x04) (R/W 32) Alarm Register -------- */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#if COMPONENT_TYPEDEF_STYLE == 'N'
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typedef union {
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struct {
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uint32_t ALMV:32; /**< bit: 0..31 Alarm Value */
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} bit; /**< Structure used for bit access */
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uint32_t reg; /**< Type used for register access */
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} RTT_AR_Type;
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#endif
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define RTT_AR_OFFSET (0x04) /**< (RTT_AR) Alarm Register Offset */
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#define RTT_AR_ALMV_Pos 0 /**< (RTT_AR) Alarm Value Position */
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#define RTT_AR_ALMV_Msk (_U_(0xFFFFFFFF) << RTT_AR_ALMV_Pos) /**< (RTT_AR) Alarm Value Mask */
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#define RTT_AR_ALMV(value) (RTT_AR_ALMV_Msk & ((value) << RTT_AR_ALMV_Pos))
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#define RTT_AR_MASK _U_(0xFFFFFFFF) /**< \deprecated (RTT_AR) Register MASK (Use RTT_AR_Msk instead) */
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#define RTT_AR_Msk _U_(0xFFFFFFFF) /**< (RTT_AR) Register Mask */
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/* -------- RTT_VR : (RTT Offset: 0x08) (R/ 32) Value Register -------- */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#if COMPONENT_TYPEDEF_STYLE == 'N'
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typedef union {
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struct {
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uint32_t CRTV:32; /**< bit: 0..31 Current Real-time Value */
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} bit; /**< Structure used for bit access */
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uint32_t reg; /**< Type used for register access */
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} RTT_VR_Type;
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#endif
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define RTT_VR_OFFSET (0x08) /**< (RTT_VR) Value Register Offset */
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#define RTT_VR_CRTV_Pos 0 /**< (RTT_VR) Current Real-time Value Position */
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#define RTT_VR_CRTV_Msk (_U_(0xFFFFFFFF) << RTT_VR_CRTV_Pos) /**< (RTT_VR) Current Real-time Value Mask */
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#define RTT_VR_CRTV(value) (RTT_VR_CRTV_Msk & ((value) << RTT_VR_CRTV_Pos))
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#define RTT_VR_MASK _U_(0xFFFFFFFF) /**< \deprecated (RTT_VR) Register MASK (Use RTT_VR_Msk instead) */
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#define RTT_VR_Msk _U_(0xFFFFFFFF) /**< (RTT_VR) Register Mask */
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/* -------- RTT_SR : (RTT Offset: 0x0c) (R/ 32) Status Register -------- */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#if COMPONENT_TYPEDEF_STYLE == 'N'
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typedef union {
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struct {
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uint32_t ALMS:1; /**< bit: 0 Real-time Alarm Status (cleared on read) */
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uint32_t RTTINC:1; /**< bit: 1 Prescaler Roll-over Status (cleared on read) */
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uint32_t :30; /**< bit: 2..31 Reserved */
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} bit; /**< Structure used for bit access */
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uint32_t reg; /**< Type used for register access */
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} RTT_SR_Type;
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#endif
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define RTT_SR_OFFSET (0x0C) /**< (RTT_SR) Status Register Offset */
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#define RTT_SR_ALMS_Pos 0 /**< (RTT_SR) Real-time Alarm Status (cleared on read) Position */
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#define RTT_SR_ALMS_Msk (_U_(0x1) << RTT_SR_ALMS_Pos) /**< (RTT_SR) Real-time Alarm Status (cleared on read) Mask */
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#define RTT_SR_ALMS RTT_SR_ALMS_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_SR_ALMS_Msk instead */
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#define RTT_SR_RTTINC_Pos 1 /**< (RTT_SR) Prescaler Roll-over Status (cleared on read) Position */
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#define RTT_SR_RTTINC_Msk (_U_(0x1) << RTT_SR_RTTINC_Pos) /**< (RTT_SR) Prescaler Roll-over Status (cleared on read) Mask */
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#define RTT_SR_RTTINC RTT_SR_RTTINC_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use RTT_SR_RTTINC_Msk instead */
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#define RTT_SR_MASK _U_(0x03) /**< \deprecated (RTT_SR) Register MASK (Use RTT_SR_Msk instead) */
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#define RTT_SR_Msk _U_(0x03) /**< (RTT_SR) Register Mask */
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#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#if COMPONENT_TYPEDEF_STYLE == 'R'
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/** \brief RTT hardware registers */
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typedef struct {
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__IO uint32_t RTT_MR; /**< (RTT Offset: 0x00) Mode Register */
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__IO uint32_t RTT_AR; /**< (RTT Offset: 0x04) Alarm Register */
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__I uint32_t RTT_VR; /**< (RTT Offset: 0x08) Value Register */
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__I uint32_t RTT_SR; /**< (RTT Offset: 0x0C) Status Register */
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} Rtt;
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#elif COMPONENT_TYPEDEF_STYLE == 'N'
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/** \brief RTT hardware registers */
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typedef struct {
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__IO RTT_MR_Type RTT_MR; /**< Offset: 0x00 (R/W 32) Mode Register */
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__IO RTT_AR_Type RTT_AR; /**< Offset: 0x04 (R/W 32) Alarm Register */
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__I RTT_VR_Type RTT_VR; /**< Offset: 0x08 (R/ 32) Value Register */
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__I RTT_SR_Type RTT_SR; /**< Offset: 0x0C (R/ 32) Status Register */
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} Rtt;
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#else /* COMPONENT_TYPEDEF_STYLE */
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#error Unknown component typedef style
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#endif /* COMPONENT_TYPEDEF_STYLE */
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#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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/** @} end of Real-time Timer */
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#endif /* _SAME70_RTT_COMPONENT_H_ */
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