mirror of https://github.com/Desuuuu/klipper.git
241 lines
8.0 KiB
C
241 lines
8.0 KiB
C
/**
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******************************************************************************
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* @file stm32f1xx_hal_iwdg.h
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* @author MCD Application Team
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* @version V1.1.1
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* @date 12-May-2017
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* @brief Header file of IWDG HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F1xx_HAL_IWDG_H
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#define __STM32F1xx_HAL_IWDG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx_hal_def.h"
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/** @addtogroup STM32F1xx_HAL_Driver
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* @{
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*/
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/** @addtogroup IWDG
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Types IWDG Exported Types
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* @{
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*/
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/**
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* @brief IWDG Init structure definition
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*/
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typedef struct
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{
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uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
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This parameter can be a value of @ref IWDG_Prescaler */
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uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
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This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
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} IWDG_InitTypeDef;
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/**
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* @brief IWDG Handle Structure definition
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*/
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typedef struct
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{
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IWDG_TypeDef *Instance; /*!< Register base address */
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IWDG_InitTypeDef Init; /*!< IWDG required parameters */
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}IWDG_HandleTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
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* @{
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*/
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/** @defgroup IWDG_Prescaler IWDG Prescaler
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* @{
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*/
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#define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */
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#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
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#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
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#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
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#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
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#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
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#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
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* @{
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*/
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/**
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* @brief Enable the IWDG peripheral.
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
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/**
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* @brief Reload IWDG counter with value defined in the reload register
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* (write access to IWDG_PR & IWDG_RLR registers disabled).
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
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* @{
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*/
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/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
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* @{
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*/
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/* Initialization/Start functions ********************************************/
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HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
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/**
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* @}
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*/
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/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
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* @{
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*/
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/* I/O operation functions ****************************************************/
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HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup IWDG_Private_Constants IWDG Private Constants
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* @{
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*/
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/**
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* @brief IWDG Key Register BitMask
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*/
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#define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
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#define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
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#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
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#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup IWDG_Private_Macros IWDG Private Macros
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* @{
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*/
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/**
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* @brief Enable write access to IWDG_PR and IWDG_RLR registers.
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
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/**
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* @brief Disable write access to IWDG_PR and IWDG_RLR registers.
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
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/**
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* @brief Check IWDG prescaler value.
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* @param __PRESCALER__ IWDG prescaler value
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* @retval None
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*/
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#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
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((__PRESCALER__) == IWDG_PRESCALER_8) || \
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((__PRESCALER__) == IWDG_PRESCALER_16) || \
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((__PRESCALER__) == IWDG_PRESCALER_32) || \
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((__PRESCALER__) == IWDG_PRESCALER_64) || \
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((__PRESCALER__) == IWDG_PRESCALER_128)|| \
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((__PRESCALER__) == IWDG_PRESCALER_256))
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/**
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* @brief Check IWDG reload value.
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* @param __RELOAD__ IWDG reload value
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* @retval None
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*/
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#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32F1xx_HAL_IWDG_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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