From e6d1910ef97fdc6e49bdd5cd82e0bd310d3b246b Mon Sep 17 00:00:00 2001
From: Arek <arek@raj.priv.pl>
Date: Fri, 19 Feb 2021 02:12:32 +0100
Subject: [PATCH] stm32: Add STM32F429 variant (#3926)

* Add F429 variant; add CAN on PD0,PD1; add 25Mhx clock; move CAN1_RX from PI8 to correct position (PI9)

* Add test for STM32F429

Signed-off-by: Arkadiusz Raj <arek.raj@gmail.com>
---
 src/stm32/Kconfig             | 20 ++++++++++++++------
 src/stm32/can.c               | 11 ++++++++---
 test/configs/stm32f429.config |  3 +++
 3 files changed, 25 insertions(+), 9 deletions(-)
 create mode 100644 test/configs/stm32f429.config

diff --git a/src/stm32/Kconfig b/src/stm32/Kconfig
index aa86cfeb..6534b576 100644
--- a/src/stm32/Kconfig
+++ b/src/stm32/Kconfig
@@ -34,6 +34,9 @@ choice
     config MACH_STM32F407
         bool "STM32F407"
         select MACH_STM32F4
+    config MACH_STM32F429
+        bool "STM32F429"
+        select MACH_STM32F4
     config MACH_STM32F446
         bool "STM32F446"
         select MACH_STM32F4
@@ -75,6 +78,7 @@ config MCU
     default "stm32f401xc" if MACH_STM32F401
     default "stm32f405xx" if MACH_STM32F405
     default "stm32f407xx" if MACH_STM32F407
+    default "stm32f429xx" if MACH_STM32F429
     default "stm32f446xx" if MACH_STM32F446
 
 config CLOCK_FREQ
@@ -85,7 +89,7 @@ config CLOCK_FREQ
     default 120000000 if MACH_STM32F207
     default 84000000 if MACH_STM32F401
     default 168000000 if MACH_STM32F405 || MACH_STM32F407
-    default 180000000 if MACH_STM32F446
+    default 180000000 if MACH_STM32F446 || MACH_STM32F429
 
 config FLASH_SIZE
     hex
@@ -94,7 +98,7 @@ config FLASH_SIZE
     default 0x20000 if MACH_STM32F070
     default 0x10000 if MACH_STM32F103 # Flash size of stm32f103x8 (64KiB)
     default 0x40000 if MACH_STM32F2 || MACH_STM32F401
-    default 0x80000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F446
+    default 0x80000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F429 || MACH_STM32F446
 
 config RAM_START
     hex
@@ -108,8 +112,7 @@ config RAM_SIZE
     default 0x5000 if MACH_STM32F103 # Ram size of stm32f103x8 (20KiB)
     default 0x20000 if MACH_STM32F207
     default 0x10000 if MACH_STM32F401
-    default 0x20000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F446
-
+    default 0x20000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F429 || MACH_STM32F446
 
 config STACK_SIZE
     int
@@ -163,11 +166,14 @@ choice
         bool "12 MHz crystal"
     config STM32_CLOCK_REF_16M
         bool "16 MHz crystal"
+    config STM32_CLOCK_REF_25M
+        bool "25 MHz crystal"
     config STM32_CLOCK_REF_INTERNAL
         bool "Internal clock"
 endchoice
 config CLOCK_REF_FREQ
     int
+    default 25000000 if STM32_CLOCK_REF_25M
     default 16000000 if STM32_CLOCK_REF_16M
     default 12000000 if STM32_CLOCK_REF_12M
     default 1 if STM32_CLOCK_REF_INTERNAL
@@ -193,11 +199,13 @@ choice
     config CAN_PINS_PB8_PB9
         bool "Pins PB8(rx) and PB9(tx)"
     config CAN_PINS_PI8_PH13
-        bool "Pins PI8(rx) and PH13(tx)" if MACH_STM32F4
+        bool "Pins PI9(rx) and PH13(tx)" if MACH_STM32F4
     config CAN_PINS_PB5_PB6
         bool "Pins PB5(rx) and PB6(tx)" if MACH_STM32F4
     config CAN_PINS_PB12_PB13
-        bool "Pins PB12(rx) and PB13(tx)" if MACH_STM32F405 || MACH_STM32F407
+        bool "Pins PB12(rx) and PB13(tx)" if MACH_STM32F4
+    config CAN_PINS_PD0_PD1
+        bool "Pins PD0(rx) and PD1(tx)" if MACH_STM32F4
 endchoice
 
 config STM32F0_TRIM
diff --git a/src/stm32/can.c b/src/stm32/can.c
index 143766c7..c4d45f9c 100644
--- a/src/stm32/can.c
+++ b/src/stm32/can.c
@@ -28,8 +28,8 @@
  #define GPIO_Tx GPIO('B', 9)
 #endif
 #if CONFIG_CAN_PINS_PI8_PH13
- DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI8,PH13");
- #define GPIO_Rx GPIO('I', 8)
+ DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI9,PH13");
+ #define GPIO_Rx GPIO('I', 9)
  #define GPIO_Tx GPIO('H', 13)
 #endif
 #if CONFIG_CAN_PINS_PB5_PB6
@@ -42,6 +42,11 @@
  #define GPIO_Rx GPIO('B', 12)
  #define GPIO_Tx GPIO('B', 13)
 #endif
+#if CONFIG_CAN_PINS_PD0_PD1
+ DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PD0,PD1");
+ #define GPIO_Rx GPIO('D', 0)
+ #define GPIO_Tx GPIO('D', 1)
+#endif
 
 #if CONFIG_MACH_STM32F0
  #define SOC_CAN CAN
@@ -64,7 +69,7 @@
 #if CONFIG_MACH_STM32F4
  #warning CAN on STM32F4 is untested
  #if (CONFIG_CAN_PINS_PA11_PA12 || CONFIG_CAN_PINS_PB8_PB9 \
-      || CONFIG_CAN_PINS_PI8_PH13)
+     || CONFIG_CAN_PINS_PD0_PD1 || CONFIG_CAN_PINS_PI9_PH13)
   #define SOC_CAN CAN1
   #define CAN_RX0_IRQn  CAN1_RX0_IRQn
   #define CAN_RX1_IRQn  CAN1_RX1_IRQn
diff --git a/test/configs/stm32f429.config b/test/configs/stm32f429.config
new file mode 100644
index 00000000..97474d02
--- /dev/null
+++ b/test/configs/stm32f429.config
@@ -0,0 +1,3 @@
+# Base config file for STM32F429 ARM processor
+CONFIG_MACH_STM32=y
+CONFIG_MACH_STM32F429=y