mirror of https://github.com/Desuuuu/klipper.git
sam3x8e: Add initial support for Arduino Due boards
This adds basic support for running on the Atmel SAM3x8e micro-controllers that are found in the Arudino Due boards. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
parent
31c04261c1
commit
cc62a3dbf3
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@ -6,23 +6,24 @@
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import re
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def avr_pins(port_count):
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def port_pins(port_count, bit_count=8):
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pins = {}
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for port in range(port_count):
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portchr = chr(65 + port)
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if portchr == 'I':
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continue
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for portbit in range(8):
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pins['P%c%d' % (portchr, portbit)] = port * 8 + portbit
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for portbit in range(bit_count):
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pins['P%c%d' % (portchr, portbit)] = port * bit_count + portbit
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return pins
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PINS_atmega164 = avr_pins(4)
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PINS_atmega1280 = avr_pins(12)
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PINS_atmega164 = port_pins(4)
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PINS_atmega1280 = port_pins(12)
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MCU_PINS = {
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"atmega168": PINS_atmega164, "atmega644p": PINS_atmega164,
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"at90usb1286": avr_pins(5),
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"at90usb1286": port_pins(5),
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"atmega1280": PINS_atmega1280, "atmega2560": PINS_atmega1280,
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"sam3x8e": port_pins(4, 32)
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}
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def mcu_to_pins(mcu):
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@ -6,11 +6,14 @@ choice
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prompt "Micro-controller Architecture"
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config MACH_AVR
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bool "Atmega AVR"
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config MACH_SAM3X8E
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bool "SAM3x8e (Arduino Due)"
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config MACH_SIMU
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bool "Host simulator"
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endchoice
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source "src/avr/Kconfig"
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source "src/sam3x8e/Kconfig"
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source "src/simulator/Kconfig"
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# The HAVE_GPIO_x options allow boards to disable support for some
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@ -35,5 +38,4 @@ config NO_UNSTEP_DELAY
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config INLINE_STEPPER_HACK
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# Enables gcc to inline stepper_event() into the main timer irq handler
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bool
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default y if MACH_AVR
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default n
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default y
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@ -0,0 +1,25 @@
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# Kconfig settings for SAM3x8e processors
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if MACH_SAM3X8E
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config BOARD_DIRECTORY
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string
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default "sam3x8e"
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config MCU
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string
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default "sam3x8e"
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config CLOCK_FREQ
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int
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default 42000000 # 84000000/2
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config SERIAL
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bool
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default y
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config SERIAL_BAUD
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depends on SERIAL
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int "Baud rate for serial port"
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default 250000
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endif
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@ -0,0 +1,28 @@
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# Additional sam3x8e build rules
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# Setup the toolchain
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CROSS_PREFIX=arm-none-eabi-
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dirs-y += src/sam3x8e src/generic
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dirs-y += lib/cmsis-sam3x8e/source lib/cmsis-sam3x8e/source/gcc
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CFLAGS-y += -mthumb -mcpu=cortex-m3
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CFLAGS-y += -Ilib/cmsis-sam3x8e/include -Ilib/cmsis-sam3x8e/cmsis-include
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CFLAGS-y += -D__SAM3X8E__
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LDFLAGS-y += -Llib/cmsis-sam3x8e/source/gcc
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LDFLAGS-y += -T lib/cmsis-sam3x8e/source/gcc/sam3x8e_flash.ld
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LDFLAGS-y += --specs=nano.specs --specs=nosys.specs
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# Add source files
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src-y += sam3x8e/main.c sam3x8e/timer.c sam3x8e/gpio.c generic/crc16_ccitt.c
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src-y += ../lib/cmsis-sam3x8e/source/system_sam3xa.c
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src-y += ../lib/cmsis-sam3x8e/source/gcc/startup_sam3xa.c
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src-$(CONFIG_SERIAL) += sam3x8e/serial.c
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# Build the additional hex output file
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target-y += $(OUT)klipper.bin
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$(OUT)klipper.bin: $(OUT)klipper.elf
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@echo " Creating hex file $@"
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$(Q)$(OBJCOPY) -O binary $< $@
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@ -0,0 +1,115 @@
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// GPIO functions on sam3x8e
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//
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// Copyright (C) 2016 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include <stdint.h> // uint32_t
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#include "command.h" // shutdown
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#include "compiler.h" // ARRAY_SIZE
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#include "gpio.h" // gpio_out_setup
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#include "irq.h" // irq_save
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#include "sam3x8e.h" // Pio
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#include "sched.h" // sched_shutdown
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/****************************************************************
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* Pin mappings
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****************************************************************/
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#define GPIO(PORT, NUM) (((PORT)-'A') * 32 + (NUM))
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#define GPIO2PORT(PIN) ((PIN) / 32)
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#define GPIO2BIT(PIN) (1<<((PIN) % 32))
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static Pio * const digital_regs[] = {
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PIOA, PIOB, PIOC, PIOD
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};
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/****************************************************************
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* gpio functions
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****************************************************************/
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void
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gpio_peripheral(char bank, uint32_t bit, char ptype, uint32_t pull_up)
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{
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Pio *regs = digital_regs[bank - 'A'];
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if (ptype == 'A')
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regs->PIO_ABSR &= ~bit;
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else
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regs->PIO_ABSR |= bit;
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if (pull_up)
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regs->PIO_PUER = bit;
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else
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regs->PIO_PUDR = bit;
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regs->PIO_PDR = bit;
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}
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struct gpio_out
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gpio_out_setup(uint8_t pin, uint8_t val)
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{
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if (GPIO2PORT(pin) >= ARRAY_SIZE(digital_regs))
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goto fail;
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Pio *regs = digital_regs[GPIO2PORT(pin)];
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uint32_t bit = GPIO2BIT(pin);
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irqstatus_t flag = irq_save();
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if (val)
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regs->PIO_SODR = bit;
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else
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regs->PIO_CODR = bit;
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regs->PIO_OER = bit;
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regs->PIO_OWER = bit;
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regs->PIO_PER = bit;
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irq_restore(flag);
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return (struct gpio_out){ .regs=regs, .bit=bit };
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fail:
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shutdown("Not an output pin");
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}
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void
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gpio_out_toggle(struct gpio_out g)
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{
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Pio *regs = g.regs;
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regs->PIO_ODSR ^= g.bit;
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}
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void
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gpio_out_write(struct gpio_out g, uint8_t val)
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{
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Pio *regs = g.regs;
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if (val)
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regs->PIO_SODR = g.bit;
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else
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regs->PIO_CODR = g.bit;
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}
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struct gpio_in
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gpio_in_setup(uint8_t pin, int8_t pull_up)
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{
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if (GPIO2PORT(pin) >= ARRAY_SIZE(digital_regs))
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goto fail;
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uint32_t port = GPIO2PORT(pin);
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Pio *regs = digital_regs[port];
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uint32_t bit = GPIO2BIT(pin);
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irqstatus_t flag = irq_save();
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PMC->PMC_PCER0 = 1 << (ID_PIOA + port);
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if (pull_up)
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regs->PIO_PUER = bit;
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else
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regs->PIO_PUDR = bit;
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regs->PIO_ODR = bit;
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regs->PIO_PER = bit;
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irq_restore(flag);
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return (struct gpio_in){ .regs=regs, .bit=bit };
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fail:
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shutdown("Not an output pin");
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}
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uint8_t
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gpio_in_read(struct gpio_in g)
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{
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Pio *regs = g.regs;
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return !!(regs->PIO_PDSR & g.bit);
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}
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@ -0,0 +1,23 @@
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#ifndef __SAM3X8E_GPIO_H
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#define __SAM3X8E_GPIO_H
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#include <stdint.h>
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void gpio_peripheral(char bank, uint32_t bit, char ptype, uint32_t pull_up);
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struct gpio_out {
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void *regs;
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uint32_t bit;
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};
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struct gpio_out gpio_out_setup(uint8_t pin, uint8_t val);
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void gpio_out_toggle(struct gpio_out g);
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void gpio_out_write(struct gpio_out g, uint8_t val);
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struct gpio_in {
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void *regs;
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uint32_t bit;
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};
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struct gpio_in gpio_in_setup(uint8_t pin, int8_t pull_up);
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uint8_t gpio_in_read(struct gpio_in g);
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#endif // gpio.h
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#ifndef __SAM3X8E_IRQ_H
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#define __SAM3X8E_IRQ_H
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// Definitions for irq enable/disable on ARM Cortex-M
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static inline void irq_disable(void) {
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asm volatile("cpsid i" ::: "memory");
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}
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static inline void irq_enable(void) {
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asm volatile("cpsie i" ::: "memory");
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}
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typedef unsigned long irqstatus_t;
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static inline irqstatus_t irq_save(void) {
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irqstatus_t flag;
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asm volatile("mrs %0, primask" : "=r" (flag) :: "memory");
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irq_disable();
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return flag;
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}
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static inline void irq_restore(irqstatus_t flag) {
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asm volatile("msr primask, %0" :: "r" (flag) : "memory");
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}
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#endif // irq.h
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@ -0,0 +1,88 @@
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// Main starting point for SAM3x8e boards.
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//
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// Copyright (C) 2016 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "board/misc.h" // console_get_input
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#include "sam3x8e.h" // WDT
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#include "sched.h" // sched_main
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/****************************************************************
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* watchdog handler
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****************************************************************/
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static void
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watchdog_reset(void)
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{
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WDT->WDT_CR = 0xA5000001;
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}
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DECL_TASK(watchdog_reset);
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static void
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watchdog_init(void)
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{
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uint32_t timeout = 32768 / 2; // 500ms timeout
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WDT->WDT_MR = WDT_MR_WDRSTEN | WDT_MR_WDV(timeout) | WDT_MR_WDD(timeout);
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}
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DECL_INIT(watchdog_init);
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/****************************************************************
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* irq clearing on fault
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****************************************************************/
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// Clear the active irq if a shutdown happened in an irq handler
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static void
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clear_active_irq(void)
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{
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uint32_t psr;
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asm volatile("mrs %0, psr" : "=r" (psr));
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if (!(psr & 0x1ff))
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// Shutdown did not occur in an irq - nothing to do.
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return;
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// Clear active irq status
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psr &= ~0x1ff;
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psr |= 1<<24; // T-bit
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uint32_t temp;
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asm volatile(
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" push { %1 }\n"
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" adr %0, 1f\n"
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" push { %0 }\n"
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" push { r0, r1, r2, r3, r12, lr }\n"
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" bx %2\n"
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"1:\n"
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: "=&r"(temp) : "r"(psr), "r"(0xfffffff9));
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}
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DECL_SHUTDOWN(clear_active_irq);
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/****************************************************************
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* misc functions
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****************************************************************/
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size_t
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alloc_maxsize(size_t reqsize)
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{
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return reqsize;
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}
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void * __visible
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_sbrk(int nbytes)
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{
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extern char _end;
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static void *heap_ptr = (void *)&_end;
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void *pos = heap_ptr;
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heap_ptr = pos + nbytes;
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return pos;
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}
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// Main entry point
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int
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main(void)
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{
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SystemInit();
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sched_main();
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return 0;
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}
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@ -0,0 +1,148 @@
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// sam3x8e serial port
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//
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// Copyright (C) 2016 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include <string.h> // memmove
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#include "autoconf.h" // CONFIG_SERIAL_BAUD
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#include "board/gpio.h" // gpio_peripheral
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#include "board/io.h" // readb
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#include "board/misc.h" // console_get_input
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#include "sam3x8e.h" // UART
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#include "sched.h" // DECL_INIT
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#include "irq.h" // irq_save
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#define SERIAL_BUFFER_SIZE 96
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static char receive_buf[SERIAL_BUFFER_SIZE];
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static uint32_t receive_pos;
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static char transmit_buf[SERIAL_BUFFER_SIZE];
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static uint32_t transmit_pos, transmit_max;
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/****************************************************************
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* Serial hardware
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****************************************************************/
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static void
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serial_init(void)
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{
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gpio_peripheral('A', PIO_PA8A_URXD, 'A', 1);
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gpio_peripheral('A', PIO_PA9A_UTXD, 'A', 0);
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// Reset uart
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PMC->PMC_PCER0 = 1 << ID_UART;
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UART->UART_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS;
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UART->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS;
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UART->UART_IDR = 0xFFFFFFFF;
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// Enable uart
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UART->UART_MR = (US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_NO
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| UART_MR_CHMODE_NORMAL);
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UART->UART_BRGR = SystemCoreClock / (16 * CONFIG_SERIAL_BAUD);
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UART->UART_IER = UART_IER_RXRDY;
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NVIC_EnableIRQ(UART_IRQn);
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NVIC_SetPriority(UART_IRQn, 0);
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UART->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
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}
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DECL_INIT(serial_init);
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void __visible
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UART_Handler(void)
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{
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uint32_t status = UART->UART_SR;
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if (status & UART_SR_RXRDY) {
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uint8_t data = UART->UART_RHR;
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if (receive_pos >= sizeof(receive_buf))
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// Serial overflow - ignore it as crc error will force retransmit
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return;
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receive_buf[receive_pos++] = data;
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return;
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}
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if (status & UART_SR_TXRDY) {
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if (transmit_pos >= transmit_max)
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UART->UART_IDR = UART_IDR_TXRDY;
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else
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UART->UART_THR = transmit_buf[transmit_pos++];
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}
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}
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// Enable tx interrupts
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static void
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enable_tx_irq(void)
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{
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UART->UART_IER = UART_IDR_TXRDY;
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}
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/****************************************************************
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* Console access functions
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****************************************************************/
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// Return a buffer (and length) containing any incoming messages
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char *
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console_get_input(uint8_t *plen)
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{
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*plen = readb(&receive_pos);
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return receive_buf;
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}
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// Remove from the receive buffer the given number of bytes
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void
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console_pop_input(uint8_t len)
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{
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uint32_t copied = 0;
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for (;;) {
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uint32_t rpos = readb(&receive_pos);
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uint32_t needcopy = rpos - len;
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if (needcopy) {
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memmove(&receive_buf[copied], &receive_buf[copied + len]
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, needcopy - copied);
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copied = needcopy;
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}
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irqstatus_t flag = irq_save();
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if (rpos != readb(&receive_pos)) {
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// Raced with irq handler - retry
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irq_restore(flag);
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continue;
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}
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receive_pos = needcopy;
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irq_restore(flag);
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break;
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}
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}
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// Return an output buffer that the caller may fill with transmit messages
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char *
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console_get_output(uint8_t len)
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{
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uint32_t tpos = readb(&transmit_pos), tmax = readb(&transmit_max);
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if (tpos == tmax) {
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tpos = tmax = 0;
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writeb(&transmit_max, 0);
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||||
writeb(&transmit_pos, 0);
|
||||
}
|
||||
if (tmax + len <= sizeof(transmit_buf))
|
||||
return &transmit_buf[tmax];
|
||||
if (tmax - tpos + len > sizeof(transmit_buf))
|
||||
return NULL;
|
||||
// Disable TX irq and move buffer
|
||||
writeb(&transmit_max, 0);
|
||||
barrier();
|
||||
tpos = readb(&transmit_pos);
|
||||
tmax -= tpos;
|
||||
memmove(&transmit_buf[0], &transmit_buf[tpos], tmax);
|
||||
writeb(&transmit_pos, 0);
|
||||
barrier();
|
||||
writeb(&transmit_max, tmax);
|
||||
enable_tx_irq();
|
||||
return &transmit_buf[tmax];
|
||||
}
|
||||
|
||||
// Accept the given number of bytes added to the transmit buffer
|
||||
void
|
||||
console_push_output(uint8_t len)
|
||||
{
|
||||
writeb(&transmit_max, readb(&transmit_max) + len);
|
||||
enable_tx_irq();
|
||||
}
|
|
@ -0,0 +1,142 @@
|
|||
// SAM3x8e timer interrupt scheduling
|
||||
//
|
||||
// Copyright (C) 2016 Kevin O'Connor <kevin@koconnor.net>
|
||||
//
|
||||
// This file may be distributed under the terms of the GNU GPLv3 license.
|
||||
|
||||
#include "autoconf.h" // CONFIG_CLOCK_FREQ
|
||||
#include "board/misc.h" // timer_from_us
|
||||
#include "command.h" // shutdown
|
||||
#include "irq.h" // irq_disable
|
||||
#include "sam3x8e.h" // TC0
|
||||
#include "sched.h" // sched_timer_kick
|
||||
|
||||
|
||||
/****************************************************************
|
||||
* Low level timer code
|
||||
****************************************************************/
|
||||
|
||||
// Return the number of clock ticks for a given number of microseconds
|
||||
uint32_t
|
||||
timer_from_us(uint32_t us)
|
||||
{
|
||||
return us * (CONFIG_CLOCK_FREQ / 1000000);
|
||||
}
|
||||
|
||||
// IRQ handler
|
||||
void __visible
|
||||
TC0_Handler(void)
|
||||
{
|
||||
TC0->TC_CHANNEL[0].TC_SR; // clear irq pending
|
||||
irq_disable();
|
||||
sched_timer_kick();
|
||||
irq_enable();
|
||||
}
|
||||
|
||||
static void
|
||||
timer_set(uint32_t value)
|
||||
{
|
||||
TC0->TC_CHANNEL[0].TC_RA = value;
|
||||
}
|
||||
|
||||
static void
|
||||
timer_init(void)
|
||||
{
|
||||
TcChannel *tc = &TC0->TC_CHANNEL[0];
|
||||
// Reset the timer
|
||||
tc->TC_CCR = TC_CCR_CLKDIS;
|
||||
tc->TC_IDR = 0xFFFFFFFF;
|
||||
tc->TC_SR;
|
||||
// Enable it
|
||||
PMC->PMC_PCER0 = 1 << ID_TC0;
|
||||
tc->TC_CMR = TC_CMR_WAVE | TC_CMR_WAVSEL_UP | TC_CMR_TCCLKS_TIMER_CLOCK1;
|
||||
tc->TC_IER = TC_IER_CPAS;
|
||||
NVIC_SetPriority(TC0_IRQn, 1);
|
||||
NVIC_EnableIRQ(TC0_IRQn);
|
||||
timer_set(1);
|
||||
tc->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;
|
||||
}
|
||||
DECL_INIT(timer_init);
|
||||
|
||||
// Called by main code once every millisecond. (IRQs disabled.)
|
||||
void
|
||||
timer_periodic(void)
|
||||
{
|
||||
}
|
||||
|
||||
// Return the current time (in absolute clock ticks).
|
||||
uint32_t
|
||||
timer_read_time(void)
|
||||
{
|
||||
return TC0->TC_CHANNEL[0].TC_CV;
|
||||
}
|
||||
|
||||
#define TIMER_MIN_TICKS 100
|
||||
|
||||
// Set the next timer wake time (in absolute clock ticks). Caller
|
||||
// must disable irqs. The caller should not schedule a time more than
|
||||
// a few milliseconds in the future.
|
||||
uint8_t
|
||||
timer_set_next(uint32_t next)
|
||||
{
|
||||
uint32_t cur = timer_read_time();
|
||||
uint32_t mintime = cur + TIMER_MIN_TICKS;
|
||||
if (sched_is_before(mintime, next)) {
|
||||
timer_set(next);
|
||||
return 0;
|
||||
}
|
||||
timer_set(mintime);
|
||||
return 1;
|
||||
}
|
||||
|
||||
static uint32_t timer_repeat;
|
||||
#define TIMER_MAX_REPEAT 400
|
||||
#define TIMER_MAX_NEXT_REPEAT 150
|
||||
|
||||
#define TIMER_MIN_TRY_TICKS timer_from_us(1)
|
||||
#define TIMER_DEFER_REPEAT_TICKS timer_from_us(2)
|
||||
|
||||
// Similar to timer_set_next(), but wait for the given time if it is
|
||||
// in the near future.
|
||||
uint8_t
|
||||
timer_try_set_next(uint32_t next)
|
||||
{
|
||||
uint32_t now = timer_read_time();
|
||||
int32_t diff = next - now;
|
||||
if (diff > (int32_t)TIMER_MIN_TRY_TICKS)
|
||||
// Schedule next timer normally.
|
||||
goto done;
|
||||
|
||||
// Next timer is in the past or near future - can't reschedule to it
|
||||
uint32_t tr = timer_repeat-1;
|
||||
if (likely(tr)) {
|
||||
irq_enable();
|
||||
timer_repeat = tr;
|
||||
while (diff >= 0) {
|
||||
// Next timer is in the near future - wait for time to occur
|
||||
now = timer_read_time();
|
||||
diff = next - now;
|
||||
}
|
||||
irq_disable();
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Too many repeat timers from a single interrupt - force a pause
|
||||
timer_repeat = TIMER_MAX_NEXT_REPEAT;
|
||||
next = now + TIMER_DEFER_REPEAT_TICKS;
|
||||
if (diff < (int32_t)(-timer_from_us(1000)))
|
||||
goto fail;
|
||||
|
||||
done:
|
||||
timer_set(next);
|
||||
return 1;
|
||||
fail:
|
||||
shutdown("Rescheduled timer in the past");
|
||||
}
|
||||
|
||||
static void
|
||||
timer_task(void)
|
||||
{
|
||||
timer_repeat = TIMER_MAX_REPEAT;
|
||||
}
|
||||
DECL_TASK(timer_task);
|
Loading…
Reference in New Issue