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lpc176x: Enable full speed peripheral clocks on SPI and I2C 

Scale the bus speed within the peripheral instead of on the system bus
as scaling on the system bus slows down general register access to the
peripheral.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2018-11-21 20:40:34 -05:00
parent 4bbd631086
commit cbbc6801a0
3 changed files with 8 additions and 2 deletions
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3
src/lpc176x/i2c.c
View File

@ -29,7 +29,8 @@ i2c_init(void)
gpio_peripheral(0, 1, 3, 0);
// Set 100Khz frequency
uint32_t PCLK = SystemCoreClock / 4, pulse = PCLK / (100000 * 2);
enable_peripheral_clock(PCLK_I2C1);
uint32_t pclk = SystemCoreClock, pulse = pclk / (100000 * 2);
LPC_I2C1->I2SCLL = pulse;
LPC_I2C1->I2SCLH = pulse;

2
src/lpc176x/internal.h
View File

@ -5,6 +5,8 @@
#define PCLK_TIMER0 1
#define PCLK_UART0 3
#define PCLK_ADC 12
#define PCLK_I2C1 19
#define PCLK_SSP0 21
void enable_peripheral_clock(uint32_t pclk);
void gpio_peripheral(int bank, int pin, int func, int pullup);

5
src/lpc176x/spi.c
View File

@ -23,6 +23,9 @@ spi_init(void)
gpio_peripheral(0, 17, 2, 0);
gpio_peripheral(0, 18, 2, 0);
// Setup clock
enable_peripheral_clock(PCLK_SSP0);
// Set initial registers
LPC_SSP0->CR0 = 0x07;
LPC_SSP0->CPSR = 254;
@ -40,7 +43,7 @@ spi_setup(uint32_t bus, uint8_t mode, uint32_t rate)
// Setup clock rate and mode
struct spi_config res = {0, 0};
uint32_t pclk = SystemCoreClock / 4;
uint32_t pclk = SystemCoreClock;
uint32_t div = DIV_ROUND_UP(pclk/2, rate) << 1;
res.cpsr = div < 2 ? 2 : (div > 254 ? 254 : div);
res.cr0 = 0x07 | (mode << 6);