From c78b90767f19c9e8510c3155b89fb7ad64ca3c54 Mon Sep 17 00:00:00 2001
From: Kevin O'Connor <kevin@koconnor.net>
Date: Tue, 8 May 2018 12:20:10 -0400
Subject: [PATCH] lpc176x: Add support for GPIO pins

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
---
 klippy/pins.py      |  5 +++
 src/lpc176x/Kconfig |  1 +
 src/lpc176x/gpio.c  | 93 ++++++++++++++++++++++++++++++++++++++++++++-
 src/lpc176x/gpio.h  | 22 +++++++++++
 4 files changed, 120 insertions(+), 1 deletion(-)
 create mode 100644 src/lpc176x/gpio.h

diff --git a/klippy/pins.py b/klippy/pins.py
index 18e8b921..bfffe98e 100644
--- a/klippy/pins.py
+++ b/klippy/pins.py
@@ -25,6 +25,10 @@ def named_pins(fmt, port_count, bit_count=32):
              for port in range(port_count)
              for portbit in range(bit_count) }
 
+def lpc_pins():
+    return { 'P%d.%d' % (port, pin) : port * 32 + pin
+             for port in range(5) for pin in range(32) }
+
 def beaglebone_pins():
     gpios = named_pins("gpio%d_%d", 4)
     gpios.update({"AIN%d" % i: i+4*32 for i in range(8)})
@@ -37,6 +41,7 @@ MCU_PINS = {
     "atmega1280": port_pins(12), "atmega2560": port_pins(12),
     "sam3x8e": port_pins(4, 32),
     "stm32f103": port_pins(5, 16),
+    "lpc176x": lpc_pins(),
     "pru": beaglebone_pins(),
     "linux": {"analog%d" % i: i for i in range(8)}, # XXX
 }
diff --git a/src/lpc176x/Kconfig b/src/lpc176x/Kconfig
index d9f15dd1..df2343ad 100644
--- a/src/lpc176x/Kconfig
+++ b/src/lpc176x/Kconfig
@@ -5,6 +5,7 @@ if MACH_LPC176X
 config LPC_SELECT
     bool
     default y
+    select HAVE_GPIO
 
 config BOARD_DIRECTORY
     string
diff --git a/src/lpc176x/gpio.c b/src/lpc176x/gpio.c
index 756b0e7b..8688ee75 100644
--- a/src/lpc176x/gpio.c
+++ b/src/lpc176x/gpio.c
@@ -5,8 +5,29 @@
 // This file may be distributed under the terms of the GNU GPLv3 license.
 
 #include "LPC17xx.h" // LPC_PINCON
-#include "internal.h" // gpio_peripheral
 #include "board/irq.h" // irq_save
+#include "command.h" // shutdown
+#include "gpio.h" // gpio_out_setup
+#include "internal.h" // gpio_peripheral
+#include "sched.h" // sched_shutdown
+
+
+/****************************************************************
+ * Pin mappings
+ ****************************************************************/
+
+#define GPIO(PORT, NUM) ((PORT) * 32 + (NUM))
+#define GPIO2PORT(PIN) ((PIN) / 32)
+#define GPIO2BIT(PIN) (1<<((PIN) % 32))
+
+static LPC_GPIO_TypeDef * const digital_regs[] = {
+    LPC_GPIO0, LPC_GPIO1, LPC_GPIO2, LPC_GPIO3, LPC_GPIO4
+};
+
+
+/****************************************************************
+ * General Purpose Input Output (GPIO) pins
+ ****************************************************************/
 
 // Set the mode and extended function of a pin
 void
@@ -26,3 +47,73 @@ gpio_peripheral(int bank, int pin, int func, int pullup)
     pinmode[bank_pos] = (pinmode[bank_pos] & mask) | mode_bits;
     irq_restore(flag);
 }
+
+
+struct gpio_out
+gpio_out_setup(uint8_t pin, uint8_t val)
+{
+    if (GPIO2PORT(pin) >= ARRAY_SIZE(digital_regs))
+        goto fail;
+    LPC_GPIO_TypeDef *regs = digital_regs[GPIO2PORT(pin)];
+    uint32_t bit = GPIO2BIT(pin);
+    irqstatus_t flag = irq_save();
+    if (val)
+        regs->FIOSET = bit;
+    else
+        regs->FIOCLR = bit;
+    regs->FIODIR |= bit;
+    irq_restore(flag);
+    return (struct gpio_out){ .regs=regs, .bit=bit };
+fail:
+    shutdown("Not an output pin");
+}
+
+void
+gpio_out_toggle_noirq(struct gpio_out g)
+{
+    LPC_GPIO_TypeDef *regs = g.regs;
+    regs->FIOPIN = regs->FIOSET ^ g.bit;
+}
+
+void
+gpio_out_toggle(struct gpio_out g)
+{
+    irqstatus_t flag = irq_save();
+    gpio_out_toggle_noirq(g);
+    irq_restore(flag);
+}
+
+void
+gpio_out_write(struct gpio_out g, uint8_t val)
+{
+    LPC_GPIO_TypeDef *regs = g.regs;
+    if (val)
+        regs->FIOSET = g.bit;
+    else
+        regs->FIOCLR = g.bit;
+}
+
+
+struct gpio_in
+gpio_in_setup(uint8_t pin, int8_t pull_up)
+{
+    if (GPIO2PORT(pin) >= ARRAY_SIZE(digital_regs))
+        goto fail;
+    uint32_t port = GPIO2PORT(pin);
+    LPC_GPIO_TypeDef *regs = digital_regs[port];
+    uint32_t bit = GPIO2BIT(pin);
+    irqstatus_t flag = irq_save();
+    gpio_peripheral(port, pin % 32, 0, pull_up);
+    regs->FIODIR &= ~bit;
+    irq_restore(flag);
+    return (struct gpio_in){ .regs=regs, .bit=bit };
+fail:
+    shutdown("Not an input pin");
+}
+
+uint8_t
+gpio_in_read(struct gpio_in g)
+{
+    LPC_GPIO_TypeDef *regs = g.regs;
+    return !!(regs->FIOPIN & g.bit);
+}
diff --git a/src/lpc176x/gpio.h b/src/lpc176x/gpio.h
new file mode 100644
index 00000000..030528e6
--- /dev/null
+++ b/src/lpc176x/gpio.h
@@ -0,0 +1,22 @@
+#ifndef __LPC176X_GPIO_H
+#define __LPC176X_GPIO_H
+
+#include <stdint.h>
+
+struct gpio_out {
+    void *regs;
+    uint32_t bit;
+};
+struct gpio_out gpio_out_setup(uint8_t pin, uint8_t val);
+void gpio_out_toggle_noirq(struct gpio_out g);
+void gpio_out_toggle(struct gpio_out g);
+void gpio_out_write(struct gpio_out g, uint8_t val);
+
+struct gpio_in {
+    void *regs;
+    uint32_t bit;
+};
+struct gpio_in gpio_in_setup(uint8_t pin, int8_t pull_up);
+uint8_t gpio_in_read(struct gpio_in g);
+
+#endif // gpio.h