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stm32: Increase adc sample time 

Increase the sample time register from 3 to 4 (which adds about ~1.5us
to each adc sample).

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2020-01-25 10:48:26 -05:00
parent 264aac5856
commit bf3fa979f9
1 changed files with 4 additions and 4 deletions
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8
src/stm32/adc.c
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@ -35,9 +35,9 @@ static const uint8_t adc_pins[] = {
#endif
// ADC timing:
// stm32f103: ADC clock=9Mhz, Tconv=12.5, Tsamp=28.5, total=4.556us
// stm32f407: ADC clock=21Mhz, Tconv=12, Tsamp=56, total=3.238us
// stm32f446: ADC clock=22.5Mhz, Tconv=12, Tsamp=56, total=3.022us
// stm32f103: ADC clock=9Mhz, Tconv=12.5, Tsamp=41.5, total=6.000us
// stm32f407: ADC clock=21Mhz, Tconv=12, Tsamp=84, total=4.571us
// stm32f446: ADC clock=22.5Mhz, Tconv=12, Tsamp=84, total=4.267us
struct gpio_adc
gpio_adc_setup(uint32_t pin)
@ -66,7 +66,7 @@ gpio_adc_setup(uint32_t pin)
// Enable the ADC
if (!is_enabled_pclock(adc_base)) {
enable_pclock(adc_base);
uint32_t aticks = 3; // 2.5-3.2us (depending on stm32 chip)
uint32_t aticks = 4; // 4-6us sample time (depending on stm32 chip)
adc->SMPR1 = (aticks | (aticks << 3) | (aticks << 6) | (aticks << 9)
| (aticks << 12) | (aticks << 15) | (aticks << 18)
| (aticks << 21)