stm32: Support stm32f042 build from stm32/ directory

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-09-16 21:39:29 -04:00
parent 2c535106ee
commit a6d90bb95e
4 changed files with 41 additions and 4 deletions

View File

@ -20,9 +20,9 @@ choice
config MACH_LPC176X
bool "LPC176x (Smoothieboard)"
config MACH_STM32
bool "STMicroelectronics STM32F1/F4"
bool "STMicroelectronics STM32"
config MACH_STM32F0_HAL
bool "STMicroelectronics STM32F042"
bool "STMicroelectronics STM32F042 (with CAN)"
config MACH_PRU
bool "Beaglebone PRU"
config MACH_LINUX

View File

@ -29,6 +29,9 @@ choice
config MACH_STM32F446
bool "STM32F446"
select MACH_STM32F4
config MACH_STM32F042
bool "STM32F042"
select MACH_STM32F0
config MACH_STM32F070
bool "STM32F070"
select MACH_STM32F0
@ -51,6 +54,7 @@ config HAVE_STM32_USBOTG
config MCU
string
default "stm32f042x6" if MACH_STM32F042
default "stm32f070xb" if MACH_STM32F070
default "stm32f103xe" if MACH_STM32F103
default "stm32f405xx" if MACH_STM32F405
@ -66,6 +70,7 @@ config CLOCK_FREQ
config FLASH_SIZE
hex
default 0x8000 if MACH_STM32F042
default 0x20000 if MACH_STM32F070
default 0x10000 if MACH_STM32F103
default 0x80000 if MACH_STM32F4
@ -76,6 +81,7 @@ config RAM_START
config RAM_SIZE
hex
default 0x1800 if MACH_STM32F042
default 0x4000 if MACH_STM32F070
default 0x5000 if MACH_STM32F103
default 0x20000 if MACH_STM32F4

View File

@ -14,7 +14,9 @@
DECL_ENUMERATION_RANGE("pin", "PA0", GPIO('A', 0), 16);
DECL_ENUMERATION_RANGE("pin", "PB0", GPIO('B', 0), 16);
DECL_ENUMERATION_RANGE("pin", "PC0", GPIO('C', 0), 16);
#ifdef GPIOD
DECL_ENUMERATION_RANGE("pin", "PD0", GPIO('D', 0), 16);
#endif
#ifdef GPIOE
DECL_ENUMERATION_RANGE("pin", "PE0", GPIO('E', 0), 16);
#endif
@ -30,7 +32,10 @@ DECL_ENUMERATION_RANGE("pin", "PI0", GPIO('I', 0), 16);
#endif
GPIO_TypeDef * const digital_regs[] = {
['A' - 'A'] = GPIOA, GPIOB, GPIOC, GPIOD,
['A' - 'A'] = GPIOA, GPIOB, GPIOC,
#ifdef GPIOD
['D' - 'A'] = GPIOD,
#endif
#ifdef GPIOE
['E' - 'A'] = GPIOE,
#endif

View File

@ -124,6 +124,29 @@ pll_setup(void)
RCC->CFGR3 = RCC_CFGR3_USBSW;
}
// Configure and enable internal 48Mhz clock on the stm32f042
static void
hsi48_setup(void)
{
#if CONFIG_MACH_STM32F042
// Enable HSI48
RCC->CR2 |= RCC_CR2_HSI48ON;
while (!(RCC->CR2 & RCC_CR2_HSI48RDY))
;
// Switch system clock to HSI48
RCC->CFGR = RCC_CFGR_SW_HSI48;
while ((RCC->CFGR & RCC_CFGR_SWS_Msk) != RCC_CFGR_SWS_HSI48)
;
// Enable USB clock recovery
if (CONFIG_USBSERIAL) {
enable_pclock(CRS_BASE);
CRS->CR |= CRS_CR_AUTOTRIMEN | CRS_CR_CEN;
}
#endif
}
// Main clock setup called at chip startup
void
clock_setup(void)
@ -132,5 +155,8 @@ clock_setup(void)
FLASH->ACR = (1 << FLASH_ACR_LATENCY_Pos) | FLASH_ACR_PRFTBE;
// Configure main clock
pll_setup();
if (CONFIG_MACH_STM32F042 && CONFIG_STM32_CLOCK_REF_INTERNAL)
hsi48_setup();
else
pll_setup();
}