From 9bc3a29ee4ce2816c00564c7f432a9bef94fbee2 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Sun, 28 Jul 2019 11:53:28 -0400 Subject: [PATCH] stm32f4: Add support for full range of GPIO pins Signed-off-by: Kevin O'Connor --- src/stm32f4/clock.c | 35 +++++++++++++++++++++++++++++------ src/stm32f4/gpio.c | 37 +++++++++++++------------------------ src/stm32f4/internal.h | 2 ++ 3 files changed, 44 insertions(+), 30 deletions(-) diff --git a/src/stm32f4/clock.c b/src/stm32f4/clock.c index b5fd16f8..e61fee53 100644 --- a/src/stm32f4/clock.c +++ b/src/stm32f4/clock.c @@ -1,10 +1,11 @@ -// Code to setup clocks on stm32f4 +// Code to setup clocks and gpio on stm32f4 // // Copyright (C) 2019 Kevin O'Connor // // This file may be distributed under the terms of the GNU GPLv3 license. #include "autoconf.h" // CONFIG_STM32F4_CLOCK_REF_8M +#include "command.h" // DECL_CONSTANT_STR #include "internal.h" // enable_pclock #define FREQ_PERIPH (CONFIG_CLOCK_FREQ / 4) @@ -52,6 +53,33 @@ get_pclock_frequency(uint32_t periph_base) return FREQ_PERIPH; } +// Set the mode and extended function of a pin +void +gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) +{ + GPIO_TypeDef *regs = digital_regs[GPIO2PORT(gpio)]; + + // Enable GPIO clock + uint32_t rcc_pos = ((uint32_t)regs - AHB1PERIPH_BASE) / 0x400; + RCC->AHB1ENR |= (1<> 4; + uint32_t pup = pullup ? (pullup > 0 ? 1 : 2) : 0; + uint32_t pos = gpio % 16, af_reg = pos / 8; + uint32_t af_shift = (pos % 8) * 4, af_msk = 0x0f << af_shift; + uint32_t m_shift = pos * 2, m_msk = 0x03 << m_shift; + + regs->AFR[af_reg] = (regs->AFR[af_reg] & ~af_msk) | (func << af_shift); + regs->MODER = (regs->MODER & ~m_msk) | (mode_bits << m_shift); + regs->PUPDR = (regs->PUPDR & ~m_msk) | (pup << m_shift); + regs->OSPEEDR = (regs->OSPEEDR & ~m_msk) | (0x02 << m_shift); +} + +#if CONFIG_STM32F4_CLOCK_REF_8M +DECL_CONSTANT_STR("RESERVE_PINS_crystal", "PH0,PH1"); +#endif + // Clock configuration static void enable_clock_stm32f40x(void) @@ -127,9 +155,4 @@ clock_setup(void) RCC->CFGR = RCC_CFGR_PPRE1_DIV4 | RCC_CFGR_PPRE2_DIV4 | RCC_CFGR_SW_PLL; while ((RCC->CFGR & RCC_CFGR_SWS_Msk) != RCC_CFGR_SWS_PLL) ; - - // Enable GPIO clocks - enable_pclock(GPIOA_BASE); - enable_pclock(GPIOB_BASE); - enable_pclock(GPIOC_BASE); } diff --git a/src/stm32f4/gpio.c b/src/stm32f4/gpio.c index 707eaf18..77a00c0f 100644 --- a/src/stm32f4/gpio.c +++ b/src/stm32f4/gpio.c @@ -14,28 +14,22 @@ DECL_ENUMERATION_RANGE("pin", "PA0", GPIO('A', 0), 32); DECL_ENUMERATION_RANGE("pin", "PB0", GPIO('B', 0), 32); DECL_ENUMERATION_RANGE("pin", "PC0", GPIO('C', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PD0", GPIO('D', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PE0", GPIO('E', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PF0", GPIO('F', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PG0", GPIO('G', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PH0", GPIO('H', 0), 32); +#ifdef GPIOI +DECL_ENUMERATION_RANGE("pin", "PI0", GPIO('I', 0), 32); +#endif -static GPIO_TypeDef * const digital_regs[] = { - GPIOA, GPIOB, GPIOC +GPIO_TypeDef * const digital_regs[] = { + GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, +#ifdef GPIOI + GPIOI, +#endif }; -// Set the mode and extended function of a pin -void -gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) -{ - GPIO_TypeDef *regs = digital_regs[GPIO2PORT(gpio)]; - uint32_t mode_bits = mode & 0x0f, func = mode >> 4; - uint32_t pup = pullup ? (pullup > 0 ? 1 : 2) : 0; - uint32_t pos = gpio % 16, af_reg = pos / 8; - uint32_t af_shift = (pos % 8) * 4, af_msk = 0x0f << af_shift; - uint32_t m_shift = pos * 2, m_msk = 0x03 << m_shift; - - regs->AFR[af_reg] = (regs->AFR[af_reg] & ~af_msk) | (func << af_shift); - regs->MODER = (regs->MODER & ~m_msk) | (mode_bits << m_shift); - regs->PUPDR = (regs->PUPDR & ~m_msk) | (pup << m_shift); - regs->OSPEEDR = (regs->OSPEEDR & ~m_msk) | (0x02 << m_shift); -} - // Convert a register and bit location back to an integer pin identifier static int regs_to_pin(GPIO_TypeDef *regs, uint32_t bit) @@ -47,11 +41,6 @@ regs_to_pin(GPIO_TypeDef *regs, uint32_t bit) return 0; } - -/**************************************************************** - * General Purpose Input Output (GPIO) pins - ****************************************************************/ - struct gpio_out gpio_out_setup(uint32_t pin, uint32_t val) { diff --git a/src/stm32f4/internal.h b/src/stm32f4/internal.h index 062d7c65..22720a96 100644 --- a/src/stm32f4/internal.h +++ b/src/stm32f4/internal.h @@ -4,6 +4,8 @@ #include "stm32f4xx.h" +extern GPIO_TypeDef * const digital_regs[]; + #define GPIO(PORT, NUM) (((PORT)-'A') * 16 + (NUM)) #define GPIO2PORT(PIN) ((PIN) / 16) #define GPIO2BIT(PIN) (1<<((PIN) % 16))