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lpc176x: Fix adc clock divisor 

Commit 1096075d changed CONFIG_CLOCK_FREQ to the actual cpu frequency,
but that commit failed to update adc.c accordingly.  That made the adc
run 4 times slower.  Make the corresponding change to adc.c.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-06-19 20:48:08 -04:00
parent 077c6f7e5e
commit 8d029ad652
1 changed files with 2 additions and 2 deletions
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4
src/lpc176x/adc.c
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@ -51,7 +51,7 @@ gpio_adc_setup(uint8_t pin)
if (!is_enabled_pclock(PCLK_ADC)) {
// Power up ADC
enable_pclock(PCLK_ADC);
uint32_t prescal = DIV_ROUND_UP(CONFIG_CLOCK_FREQ*4, ADC_FREQ_MAX) - 1;
uint32_t prescal = DIV_ROUND_UP(CONFIG_CLOCK_FREQ, ADC_FREQ_MAX) - 1;
LPC_ADC->ADCR = adc_status.adcr = (1<<21) | ((prescal & 0xff) << 8);
LPC_ADC->ADINTEN = 0xff;
adc_status.chan = ADC_DONE;
@ -104,7 +104,7 @@ gpio_adc_sample(struct gpio_adc g)
LPC_ADC->ADCR = adc_status.adcr | (1 << g.chan) | (1<<16);
need_delay:
return ((64 * DIV_ROUND_UP(CONFIG_CLOCK_FREQ*4, ADC_FREQ_MAX)
return ((64 * DIV_ROUND_UP(CONFIG_CLOCK_FREQ, ADC_FREQ_MAX)
* ARRAY_SIZE(adc_status.samples)) / 4 + timer_from_us(10));
}