From 7a32860455eabb4204a5dbfefc21c4bdd75561e7 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Wed, 20 Feb 2019 19:06:33 -0500 Subject: [PATCH] atsamd: Increase ADC frequency on SAMD51 The SAMD51 ADC is only clocked on rising edges (vs both rising and falling edges on the SAMD21) and it has a greater minimum frequency than the SAMD21. So, increase the ADC clock. Signed-off-by: Kevin O'Connor --- src/atsamd/adc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/atsamd/adc.c b/src/atsamd/adc.c index 1322a46c..8f23e9cb 100644 --- a/src/atsamd/adc.c +++ b/src/atsamd/adc.c @@ -108,14 +108,14 @@ adc_init(void) while(ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_REFCTRL); ADC0->SAMPCTRL.reg = ADC_SAMPCTRL_SAMPLEN(63); while (ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_SAMPCTRL); - ADC0->CTRLA.reg = ADC_CTRLA_PRESCALER(ADC_CTRLA_PRESCALER_DIV128_Val) | ADC_CTRLA_ENABLE; + ADC0->CTRLA.reg = ADC_CTRLA_PRESCALER(ADC_CTRLA_PRESCALER_DIV32_Val) | ADC_CTRLA_ENABLE; // ADC1 ADC1->REFCTRL.reg = ADC_REFCTRL_REFSEL_INTVCC1; while(ADC1->SYNCBUSY.reg & ADC_SYNCBUSY_REFCTRL); ADC1->SAMPCTRL.reg = ADC_SAMPCTRL_SAMPLEN(63); while(ADC1->SYNCBUSY.reg & ADC_SYNCBUSY_SAMPCTRL); - ADC1->CTRLA.reg = ADC_CTRLA_PRESCALER(ADC_CTRLA_PRESCALER_DIV128_Val) | ADC_CTRLA_ENABLE; + ADC1->CTRLA.reg = ADC_CTRLA_PRESCALER(ADC_CTRLA_PRESCALER_DIV32_Val) | ADC_CTRLA_ENABLE; #endif }