mirror of https://github.com/Desuuuu/klipper.git
atsam: Convert code to use armcm_timer
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor
parent
26fb421d59
commit
77db1aa379
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@ -51,9 +51,8 @@ config MCU
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config CLOCK_FREQ
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int
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default 42000000 if MACH_SAM3X # 84000000/2
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default 15000000 if MACH_SAM4S # 120000000/8
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default 60000000 if MACH_SAM4E # 120000000/2
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default 84000000 if MACH_SAM3X
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default 120000000 if MACH_SAM4
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config USBSERIAL
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bool "Use USB for communication (instead of serial)"
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@ -31,14 +31,14 @@ CFLAGS_klipper.elf += $(eflags-y) --specs=nano.specs --specs=nosys.specs
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# Add source files
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src-y += atsam/main.c atsam/gpio.c atsam/i2c.c atsam/spi.c
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src-y += generic/crc16_ccitt.c generic/alloc.c
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src-y += generic/armcm_irq.c generic/timer_irq.c
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src-y += generic/armcm_irq.c generic/armcm_timer.c
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usbserial-$(CONFIG_MACH_SAM3X) := atsam/sam3_usb.c
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usbserial-$(CONFIG_MACH_SAM4) := atsam/sam4_usb.c
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src-$(CONFIG_USBSERIAL) += $(usbserial-y) generic/usb_cdc.c
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src-$(CONFIG_SERIAL) += atsam/serial.c generic/serial_irq.c
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src-$(CONFIG_MACH_SAM3X) += atsam/adc.c atsam/timer.c
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src-$(CONFIG_MACH_SAM4S) += atsam/adc.c atsam/sam4s_timer.c
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src-$(CONFIG_MACH_SAM4E) += atsam/sam4e_afec.c atsam/timer.c atsam/sam4_cache.c
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src-$(CONFIG_MACH_SAM3X) += atsam/adc.c
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src-$(CONFIG_MACH_SAM4S) += atsam/adc.c
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src-$(CONFIG_MACH_SAM4E) += atsam/sam4e_afec.c atsam/sam4_cache.c
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src-$(CONFIG_MACH_SAM3X) += ../lib/sam3x/gcc/system_sam3xa.c
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src-$(CONFIG_MACH_SAM3X) += ../lib/sam3x/gcc/gcc/startup_sam3xa.c
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src-$(CONFIG_MACH_SAM4S) += atsam/sam4s_sysinit.c
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@ -1,118 +0,0 @@
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// SAM4s 16bit timer interrupt scheduling
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//
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// Copyright (C) 2016-2018 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "board/io.h" // readl
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#include "board/irq.h" // irq_disable
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#include "board/misc.h" // timer_read_time
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#include "board/timer_irq.h" // timer_dispatch_many
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#include "command.h" // DECL_SHUTDOWN
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#include "internal.h" // TC0
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#include "sched.h" // DECL_INIT
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/****************************************************************
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* Low level timer code
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****************************************************************/
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// Get the 16bit timer value
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static uint32_t
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timer_get(void)
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{
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return TC0->TC_CHANNEL[0].TC_CV;
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}
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// Set the next irq time
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static void
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timer_set(uint32_t value)
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{
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TC0->TC_CHANNEL[0].TC_RA = value;
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}
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// Activate timer dispatch as soon as possible
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void
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timer_kick(void)
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{
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timer_set(timer_read_time() + 50);
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}
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/****************************************************************
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* 16bit hardware timer to 32bit conversion
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****************************************************************/
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// High bits of timer (top 17 bits)
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static uint32_t timer_high;
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// Return the current time (in absolute clock ticks).
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uint32_t __always_inline
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timer_read_time(void)
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{
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uint32_t th = readl(&timer_high);
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uint32_t cur = timer_get();
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// Combine timer_high (high 17 bits) and current time (low 16
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// bits) using method that handles rollovers correctly.
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return (th ^ cur) + (th & 0x8000);
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}
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// Update timer_high every 0x8000 clock ticks
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static uint_fast8_t
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timer_event(struct timer *t)
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{
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timer_high += 0x8000;
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t->waketime = timer_high + 0x8000;
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return SF_RESCHEDULE;
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}
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static struct timer wrap_timer = {
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.func = timer_event,
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.waketime = 0x8000,
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};
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void
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timer_reset(void)
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{
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sched_add_timer(&wrap_timer);
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}
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DECL_SHUTDOWN(timer_reset);
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/****************************************************************
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* Timer init
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****************************************************************/
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void
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timer_init(void)
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{
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TcChannel *tc = &TC0->TC_CHANNEL[0];
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// Reset the timer
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tc->TC_CCR = TC_CCR_CLKDIS;
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tc->TC_IDR = 0xFFFFFFFF;
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// Enable it
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enable_pclock(ID_TC0);
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tc->TC_CMR = TC_CMR_WAVE | TC_CMR_WAVSEL_UP | TC_CMR_TCCLKS_TIMER_CLOCK2;
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tc->TC_IER = TC_IER_CPAS;
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NVIC_SetPriority(TC0_IRQn, 2);
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NVIC_EnableIRQ(TC0_IRQn);
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timer_kick();
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timer_reset();
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tc->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;
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}
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DECL_INIT(timer_init);
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/****************************************************************
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* Main timer dispatch irq handler
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****************************************************************/
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// IRQ handler
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void __visible __aligned(16) // aligning helps stabilize perf benchmarks
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TC0_Handler(void)
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{
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irq_disable();
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uint32_t next = timer_dispatch_many();
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timer_set(next);
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TC0->TC_CHANNEL[0].TC_SR; // read to clear irq pending
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irq_enable();
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}
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@ -1,65 +0,0 @@
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// SAM3/SAM4 timer interrupt scheduling
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//
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// Copyright (C) 2016-2018 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "board/irq.h" // irq_disable
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#include "board/misc.h" // timer_read_time
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#include "board/timer_irq.h" // timer_dispatch_many
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#include "command.h" // DECL_SHUTDOWN
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#include "internal.h" // TC0
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#include "sched.h" // DECL_INIT
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// Set the next irq time
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static void
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timer_set(uint32_t value)
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{
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TC0->TC_CHANNEL[0].TC_RA = value;
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}
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// Return the current time (in absolute clock ticks).
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uint32_t
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timer_read_time(void)
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{
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return TC0->TC_CHANNEL[0].TC_CV;
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}
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// Activate timer dispatch as soon as possible
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void
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timer_kick(void)
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{
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timer_set(timer_read_time() + 50);
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TC0->TC_CHANNEL[0].TC_SR; // read to clear irq pending
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}
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void
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timer_init(void)
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{
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TcChannel *tc = &TC0->TC_CHANNEL[0];
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// Reset the timer
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tc->TC_CCR = TC_CCR_CLKDIS;
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tc->TC_IDR = 0xFFFFFFFF;
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// Enable it
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enable_pclock(ID_TC0);
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tc->TC_CMR = TC_CMR_WAVE | TC_CMR_WAVSEL_UP | TC_CMR_TCCLKS_TIMER_CLOCK1;
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tc->TC_IER = TC_IER_CPAS;
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NVIC_SetPriority(TC0_IRQn, 2);
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NVIC_EnableIRQ(TC0_IRQn);
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timer_kick();
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tc->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;
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}
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DECL_INIT(timer_init);
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// IRQ handler
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void __visible __aligned(16) // aligning helps stabilize perf benchmarks
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TC0_Handler(void)
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{
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irq_disable();
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uint32_t status = TC0->TC_CHANNEL[0].TC_SR; // read to clear irq pending
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if (likely(status & TC_SR_CPAS)) {
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uint32_t next = timer_dispatch_many();
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timer_set(next);
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}
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irq_enable();
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}
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