diff --git a/src/Kconfig b/src/Kconfig index d8d8a19e..08a57c16 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -57,18 +57,21 @@ config USBSERIAL bool config USBCANBUS bool +config USB + bool + default y if USBSERIAL || USBCANBUS config USB_VENDOR_ID default 0x1d50 config USB_DEVICE_ID default 0x614e config USB_SERIAL_NUMBER_CHIPID - depends on HAVE_CHIPID && (USBSERIAL || USBCANBUS) + depends on USB && HAVE_CHIPID default y config USB_SERIAL_NUMBER default "12345" menu "USB ids" - depends on (USBSERIAL || USBCANBUS) && LOW_LEVEL_OPTIONS + depends on USB && LOW_LEVEL_OPTIONS config USB_VENDOR_ID hex "USB vendor ID" if USBSERIAL config USB_DEVICE_ID diff --git a/src/stm32/stm32f0.c b/src/stm32/stm32f0.c index 98933b9d..e63f1b5b 100644 --- a/src/stm32/stm32f0.c +++ b/src/stm32/stm32f0.c @@ -86,7 +86,7 @@ pll_setup(void) // Setup CFGR3 register uint32_t cfgr3 = RCC_CFGR3_I2C1SW; -#if CONFIG_USBSERIAL +#if CONFIG_USB // Select PLL as source for USB clock cfgr3 |= RCC_CFGR3_USBSW; #endif @@ -109,7 +109,7 @@ hsi48_setup(void) ; // Enable USB clock recovery - if (CONFIG_USBSERIAL) { + if (CONFIG_USB) { enable_pclock(CRS_BASE); CRS->CR |= CRS_CR_AUTOTRIMEN | CRS_CR_CEN; } @@ -150,7 +150,7 @@ usb_reboot_for_dfu_bootloader(void) static void check_usb_dfu_bootloader(void) { - if (!CONFIG_USBSERIAL || !CONFIG_MACH_STM32F0x2 + if (!CONFIG_USB || !CONFIG_MACH_STM32F0x2 || *(uint64_t*)USB_BOOT_FLAG_ADDR != USB_BOOT_FLAG) return; *(uint64_t*)USB_BOOT_FLAG_ADDR = 0; @@ -204,8 +204,7 @@ armcm_main(void) FLASH->ACR = (1 << FLASH_ACR_LATENCY_Pos) | FLASH_ACR_PRFTBE; // Configure main clock - if (CONFIG_MACH_STM32F0x2 && CONFIG_STM32_CLOCK_REF_INTERNAL - && CONFIG_USBSERIAL) + if (CONFIG_MACH_STM32F0x2 && CONFIG_STM32_CLOCK_REF_INTERNAL && CONFIG_USB) hsi48_setup(); else pll_setup(); diff --git a/src/stm32/stm32f4.c b/src/stm32/stm32f4.c index 0b032de7..4f1dc084 100644 --- a/src/stm32/stm32f4.c +++ b/src/stm32/stm32f4.c @@ -139,7 +139,7 @@ enable_clock_stm32f446(void) ; // Enable 48Mhz USB clock - if (CONFIG_USBSERIAL) { + if (CONFIG_USB) { uint32_t ref = (CONFIG_STM32_CLOCK_REF_INTERNAL ? 16000000 : CONFIG_CLOCK_REF_FREQ); uint32_t plls_base = 2000000, plls_freq = FREQ_USB * 4; @@ -220,7 +220,7 @@ usb_reboot_for_dfu_bootloader(void) static void check_usb_dfu_bootloader(void) { - if (!CONFIG_USBSERIAL || *(uint64_t*)USB_BOOT_FLAG_ADDR != USB_BOOT_FLAG) + if (!CONFIG_USB || *(uint64_t*)USB_BOOT_FLAG_ADDR != USB_BOOT_FLAG) return; *(uint64_t*)USB_BOOT_FLAG_ADDR = 0; uint32_t *sysbase = (uint32_t*)0x1fff0000; diff --git a/src/stm32/stm32g0.c b/src/stm32/stm32g0.c index 36191ebf..63edcbaa 100644 --- a/src/stm32/stm32g0.c +++ b/src/stm32/stm32g0.c @@ -123,7 +123,7 @@ usb_reboot_for_dfu_bootloader(void) static void check_usb_dfu_bootloader(void) { - if (!CONFIG_USBSERIAL || *(uint64_t*)USB_BOOT_FLAG_ADDR != USB_BOOT_FLAG) + if (!CONFIG_USB || *(uint64_t*)USB_BOOT_FLAG_ADDR != USB_BOOT_FLAG) return; *(uint64_t*)USB_BOOT_FLAG_ADDR = 0; uint32_t *sysbase = (uint32_t*)0x1fff0000; diff --git a/src/stm32/stm32h7.c b/src/stm32/stm32h7.c index 565353dc..122ce64b 100644 --- a/src/stm32/stm32h7.c +++ b/src/stm32/stm32h7.c @@ -171,7 +171,7 @@ clock_setup(void) ; // Configure HSI48 clock for USB - if (CONFIG_USBSERIAL) { + if (CONFIG_USB) { SET_BIT(RCC->CR, RCC_CR_HSI48ON); while((RCC->CR & RCC_CR_HSI48RDY) == 0); SET_BIT(RCC->APB1HENR, RCC_APB1HENR_CRSEN); @@ -205,7 +205,7 @@ usb_reboot_for_dfu_bootloader(void) static void check_usb_dfu_bootloader(void) { - if (!CONFIG_USBSERIAL || *(uint64_t*)USB_BOOT_FLAG_ADDR != USB_BOOT_FLAG) + if (!CONFIG_USB || *(uint64_t*)USB_BOOT_FLAG_ADDR != USB_BOOT_FLAG) return; *(uint64_t*)USB_BOOT_FLAG_ADDR = 0; uint32_t *sysbase = (uint32_t*)0x1FF09800;