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config: Force PB0 high in fysetc f6 config 

There are reports that SPI does not work correctly on the Fysetc F6 if
the PB0 (sdcard cs enable line) isn't pulled high.  Update the default
config to enable that line.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-05-24 18:07:41 -04:00
parent 6c4c26c319
commit 61530138a0
1 changed files with 3 additions and 0 deletions
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3
config/generic-fysetc-f6.cfg
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@ -141,6 +141,9 @@ max_accel: 3000
max_z_velocity: 5 max_z_velocity: 5
max_z_accel: 100 max_z_accel: 100
[static_digital_output disable_sdcard]
pins: PB0
# "RepRapDiscount 128x64 Full Graphic Smart Controller" type displays # "RepRapDiscount 128x64 Full Graphic Smart Controller" type displays
#[display] #[display]
#lcd_type: st7920 #lcd_type: st7920