atsam: Update code to use armcm_boot mechanism

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-08-21 19:29:17 -04:00
parent fc879456db
commit 44f862388f
5 changed files with 56 additions and 46 deletions

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@ -55,6 +55,28 @@ config CLOCK_FREQ
default 84000000 if MACH_SAM3X
default 120000000 if MACH_SAM4
config FLASH_START
hex
default 0x400000 if MACH_SAM4
default 0x80000
config FLASH_SIZE
hex
default 0x80000
config RAM_START
hex
default 0x20000000
config RAM_SIZE
hex
default 0x18000 if MACH_SAM3X
default 0x20000 if MACH_SAM4
config STACK_SIZE
int
default 512
config USBSERIAL
bool "Use USB for communication (instead of serial)"
default y

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@ -4,9 +4,11 @@
CROSS_PREFIX=arm-none-eabi-
dirs-y += src/atsam src/generic
dirs-$(CONFIG_MACH_SAM3X) += lib/sam3x/gcc/gcc
dirs-$(CONFIG_MACH_SAM4S) += lib/sam4s/gcc/gcc
dirs-$(CONFIG_MACH_SAM4E) += lib/sam4e/gcc/gcc
dirs-$(CONFIG_MACH_SAM3X) += lib/sam3x/gcc
dirs-$(CONFIG_MACH_SAM4S) += lib/sam4s/gcc
dirs-$(CONFIG_MACH_SAM4E) += lib/sam4e/gcc
MCU := $(shell echo $(CONFIG_MCU) | tr a-z A-Z)
CFLAGS-$(CONFIG_MACH_SAM3X) += -mcpu=cortex-m3 -falign-loops=16
CFLAGS-$(CONFIG_MACH_SAM4) += -mcpu=cortex-m4
@ -14,39 +16,28 @@ CFLAGS-$(CONFIG_MACH_SAM4E) += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
CFLAGS-$(CONFIG_MACH_SAM3X) += -Ilib/sam3x/include
CFLAGS-$(CONFIG_MACH_SAM4S) += -Ilib/sam4s/include
CFLAGS-$(CONFIG_MACH_SAM4E) += -Ilib/sam4e/include
CFLAGS-$(CONFIG_MACH_SAM3X8E) += -D__SAM3X8E__
CFLAGS-$(CONFIG_MACH_SAM3X8C) += -D__SAM3X8C__
CFLAGS-$(CONFIG_MACH_SAM4S8C) += -D__SAM4S8C__
CFLAGS-$(CONFIG_MACH_SAM4E8E) += -D__SAM4E8E__
CFLAGS += -mthumb $(CFLAGS-y) -Ilib/cmsis-core
CFLAGS += $(CFLAGS-y) -D__$(MCU)__ -mthumb -Ilib/cmsis-core
eflags-$(CONFIG_MACH_SAM3X) += -Llib/sam3x/gcc/gcc
eflags-$(CONFIG_MACH_SAM3X) += -T lib/sam3x/gcc/gcc/sam3x8e_flash.ld
eflags-$(CONFIG_MACH_SAM4S) += -Llib/sam4s/gcc/gcc
eflags-$(CONFIG_MACH_SAM4S) += -T lib/sam4s/gcc/gcc/sam4s8c_flash.ld
eflags-$(CONFIG_MACH_SAM4E) += -Llib/sam4e/gcc/gcc
eflags-$(CONFIG_MACH_SAM4E) += -T lib/sam4e/gcc/gcc/sam4e8e_flash.ld
CFLAGS_klipper.elf += $(eflags-y) --specs=nano.specs --specs=nosys.specs
CFLAGS_klipper.elf += --specs=nano.specs --specs=nosys.specs
CFLAGS_klipper.elf += -T $(OUT)src/generic/armcm_boot.ld
$(OUT)klipper.elf: $(OUT)src/generic/armcm_boot.ld
# Add source files
src-y += atsam/main.c atsam/gpio.c atsam/i2c.c atsam/spi.c atsam/hard_pwm.c
src-y += generic/crc16_ccitt.c generic/alloc.c
src-y += generic/armcm_irq.c generic/armcm_timer.c
usbserial-$(CONFIG_MACH_SAM3X) := atsam/sam3_usb.c
usbserial-$(CONFIG_MACH_SAM4) := atsam/sam4_usb.c
src-$(CONFIG_USBSERIAL) += $(usbserial-y) generic/usb_cdc.c
src-y += generic/armcm_boot.c generic/armcm_irq.c generic/armcm_timer.c
src-y += generic/crc16_ccitt.c
usb-src-$(CONFIG_MACH_SAM3X) := atsam/sam3_usb.c
usb-src-$(CONFIG_MACH_SAM4) := atsam/sam4_usb.c
src-$(CONFIG_USBSERIAL) += $(usb-src-y) generic/usb_cdc.c
src-$(CONFIG_SERIAL) += atsam/serial.c generic/serial_irq.c
src-$(CONFIG_MACH_SAM3X) += atsam/adc.c
src-$(CONFIG_MACH_SAM4S) += atsam/adc.c
src-$(CONFIG_MACH_SAM4E) += atsam/sam4e_afec.c atsam/sam4_cache.c
src-$(CONFIG_MACH_SAM3X) += ../lib/sam3x/gcc/system_sam3xa.c
src-$(CONFIG_MACH_SAM3X) += ../lib/sam3x/gcc/gcc/startup_sam3xa.c
src-$(CONFIG_MACH_SAM4S) += atsam/sam4s_sysinit.c
src-$(CONFIG_MACH_SAM4S) += ../lib/sam4s/gcc/gcc/startup_sam4s.c
src-$(CONFIG_MACH_SAM4E) += ../lib/sam4e/gcc/system_sam4e.c
src-$(CONFIG_MACH_SAM4E) += ../lib/sam4e/gcc/gcc/startup_sam4e.c
# Build the additional hex output file
# Build the additional bin output file
target-y += $(OUT)klipper.bin
$(OUT)klipper.bin: $(OUT)klipper.elf

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@ -5,6 +5,7 @@
// This file may be distributed under the terms of the GNU GPLv3 license.
#include <string.h> // NULL
#include "board/armcm_boot.h" // armcm_enable_irq
#include "board/usb_cdc.h" // usb_notify_ep0
#include "board/usb_cdc_ep.h" // USB_CDC_EP_BULK_IN
#include "internal.h" // UOTGHS
@ -179,7 +180,7 @@ handle_end_reset(void)
UOTGHS->UOTGHS_DEVICR = UOTGHS_DEVICR_EORSTC;
}
void __visible
void
UOTGHS_Handler(void)
{
uint32_t s = UOTGHS->UOTGHS_DEVISR;
@ -222,8 +223,7 @@ usbserial_init(void)
UOTGHS->UOTGHS_DEVCTRL = UOTGHS_DEVCTRL_SPDCONF_FORCED_FS;
// Enable interrupts
NVIC_SetPriority(UOTGHS_IRQn, 1);
NVIC_EnableIRQ(UOTGHS_IRQn);
armcm_enable_irq(UOTGHS_Handler, UOTGHS_IRQn, 1);
UOTGHS->UOTGHS_DEVIER = UOTGHS_DEVIER_EORSTES;
}
DECL_INIT(usbserial_init);

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@ -5,6 +5,7 @@
// This file may be distributed under the terms of the GNU GPLv3 license.
#include <string.h> // NULL
#include "board/armcm_boot.h" // armcm_enable_irq
#include "board/irq.h" // irq_disable
#include "board/usb_cdc.h" // usb_notify_ep0
#include "board/usb_cdc_ep.h" // USB_CDC_EP_BULK_IN
@ -172,7 +173,7 @@ handle_end_reset(void)
UDP->UDP_TXVC = UDP_TXVC_PUON;
}
void __visible
void
UDP_Handler(void)
{
uint32_t s = UDP->UDP_ISR;
@ -212,7 +213,6 @@ usbserial_init(void)
// Enable interrupts
UDP->UDP_ICR = 0xffffffff;
NVIC_SetPriority(UDP_IRQn, 1);
NVIC_EnableIRQ(UDP_IRQn);
armcm_enable_irq(UDP_Handler, UDP_IRQn, 1);
}
DECL_INIT(usbserial_init);

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@ -5,6 +5,7 @@
// This file may be distributed under the terms of the GNU GPLv3 license.
#include "autoconf.h" // CONFIG_SERIAL_BAUD
#include "board/armcm_boot.h" // armcm_enable_irq
#include "board/serial_irq.h" // serial_rx_data
#include "command.h" // DECL_CONSTANT_STR
#include "internal.h" // gpio_peripheral
@ -12,30 +13,27 @@
// Serial port pins
#if CONFIG_MACH_SAM3X
#define Serial_IRQ_Handler UART_Handler
#define UARTx_IRQn UART_IRQn
static Uart * const Port = UART;
static const uint32_t Pmc_id = ID_UART, Irq_id = UART_IRQn;
static const uint32_t rx_pin = GPIO('A', 8);
static const uint32_t tx_pin = GPIO('A', 9);
static const uint32_t Pmc_id = ID_UART;
static const uint32_t rx_pin = GPIO('A', 8), tx_pin = GPIO('A', 9);
DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA8,PA9");
#elif CONFIG_MACH_SAM4S
#define Serial_IRQ_Handler UART1_Handler
#define UARTx_IRQn UART1_IRQn
static Uart * const Port = UART1;
static const uint32_t Pmc_id = ID_UART1, Irq_id = UART1_IRQn;
static const uint32_t rx_pin = GPIO('B', 2);
static const uint32_t tx_pin = GPIO('B', 3);
static const uint32_t Pmc_id = ID_UART1;
static const uint32_t rx_pin = GPIO('B', 2), tx_pin = GPIO('B', 3);
DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB2,PB3");
#elif CONFIG_MACH_SAM4E
#define Serial_IRQ_Handler UART0_Handler
#define UARTx_IRQn UART0_IRQn
static Uart * const Port = UART0;
static const uint32_t Pmc_id = ID_UART0, Irq_id = UART0_IRQn;
static const uint32_t rx_pin = GPIO('A', 9);
static const uint32_t tx_pin = GPIO('A', 10);
static const uint32_t Pmc_id = ID_UART0;
static const uint32_t rx_pin = GPIO('A', 9), tx_pin = GPIO('A', 10);
DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA9,PA10");
#endif
void __visible
Serial_IRQ_Handler(void)
void
UARTx_Handler(void)
{
uint32_t status = Port->UART_SR;
if (status & UART_SR_RXRDY)
@ -74,8 +72,7 @@ serial_init(void)
| UART_MR_CHMODE_NORMAL);
Port->UART_BRGR = SystemCoreClock / (16 * CONFIG_SERIAL_BAUD);
Port->UART_IER = UART_IER_RXRDY;
NVIC_EnableIRQ(Irq_id);
NVIC_SetPriority(Irq_id, 0);
armcm_enable_irq(UARTx_Handler, UARTx_IRQn, 0);
Port->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
}
DECL_INIT(serial_init);