From 140dca1f68a46e5ee86f1ce4f99a8bc39e12b342 Mon Sep 17 00:00:00 2001 From: Desuuuu Date: Sun, 9 Oct 2022 19:11:29 +0200 Subject: [PATCH] t5uid1: Improve STM32 support --- src/stm32/t5uid1/Kconfig | 95 ++++++++++++++++++++++-------- src/stm32/t5uid1/Makefile | 4 +- src/stm32/t5uid1/serial.c | 97 +++++++++++++++++++++---------- src/stm32/t5uid1/stm32_serial.h | 29 +++++++++ src/stm32/t5uid1/stm32f0_serial.c | 77 ------------------------ src/stm32/t5uid1/stm32f0_serial.h | 27 +++++++++ src/stm32/t5uid1/stm32g0_serial.h | 33 +++++++++++ src/stm32/t5uid1/stm32h7_serial.h | 31 ++++++++++ 8 files changed, 258 insertions(+), 135 deletions(-) create mode 100644 src/stm32/t5uid1/stm32_serial.h delete mode 100644 src/stm32/t5uid1/stm32f0_serial.c create mode 100644 src/stm32/t5uid1/stm32f0_serial.h create mode 100644 src/stm32/t5uid1/stm32g0_serial.h create mode 100644 src/stm32/t5uid1/stm32h7_serial.h diff --git a/src/stm32/t5uid1/Kconfig b/src/stm32/t5uid1/Kconfig index 967e12bc..9974654c 100644 --- a/src/stm32/t5uid1/Kconfig +++ b/src/stm32/t5uid1/Kconfig @@ -1,32 +1,81 @@ # Kconfig T5UID1 settings for STM32 processors +config STM32_SERIAL_USART1_USED + bool + depends on SERIAL + default y if STM32_SERIAL_USART1 || STM32_SERIAL_USART1_ALT_PB7_PB6 + +config STM32_SERIAL_USART2_USED + bool + depends on SERIAL + default y if STM32_SERIAL_USART2 || STM32_SERIAL_USART2_ALT_PA15_PA14 || STM32_SERIAL_USART2_ALT_PD6_PD5 + +config STM32_SERIAL_USART3_USED + bool + depends on SERIAL + default y if STM32_SERIAL_USART3 || STM32_SERIAL_USART3_ALT_PD9_PD8 + +config STM32_SERIAL_UART4_USED + bool + depends on SERIAL + default y if STM32_SERIAL_UART4 + config T5UID1_SERIAL bool "Enable DGUS T5UID1 screen" + depends on !MACH_STM32F031 + default n + +config STM32_T5UID1_SERIAL_USART1 + bool + default n + +config STM32_T5UID1_SERIAL_USART2 + bool + default n + +config STM32_T5UID1_SERIAL_USART3 + bool + default n + +config STM32_T5UID1_SERIAL_UART4 + bool default n choice depends on T5UID1_SERIAL - prompt "Screen Serial Port" if LOW_LEVEL_OPTIONS - default STM32_T5UID1_SERIAL_USART2 if !STM32_SERIAL_USART2 && !STM32_SERIAL_USART2_ALT - default STM32_T5UID1_SERIAL_USART1 - help - Select the serial device to use for the touchscreen. - config STM32_T5UID1_SERIAL_USART1 - bool "USART1" if !STM32_SERIAL_USART1 - config STM32_T5UID1_SERIAL_USART2 - bool "USART2 (on PA3/PA2)" if !STM32_SERIAL_USART2 && !STM32_SERIAL_USART2_ALT - config STM32_T5UID1_SERIAL_USART2_ALT - bool "USART2 (on PA15/PA14)" if MACH_STM32F0 && !STM32_SERIAL_USART2 && !STM32_SERIAL_USART2_ALT - config STM32_T5UID1_SERIAL_USART3 - bool "USART3" if !STM32_SERIAL_USART3 && !STM32_SERIAL_USART3_ALT - config STM32_T5UID1_SERIAL_USART3_ALT - bool "USART3 (on PD9/PD8)" if MACH_STM32F4 && !STM32_SERIAL_USART3 && !STM32_SERIAL_USART3_ALT + prompt "Screen serial interface" if LOW_LEVEL_OPTIONS + default STM32_T5UID1_SERIAL_USART2_PA3_PA2 if !STM32_SERIAL_USART2_USED + default STM32_T5UID1_SERIAL_USART1_PA10_PA9 + config STM32_T5UID1_SERIAL_USART1_PA10_PA9 + bool "USART1 (on PA10/PA9)" + depends on !STM32_SERIAL_USART1_USED + select STM32_T5UID1_SERIAL_USART1 + config STM32_T5UID1_SERIAL_USART1_PB7_PB6 + bool "USART1 (on PB7/PB6)" + depends on !STM32_SERIAL_USART1_USED + select STM32_T5UID1_SERIAL_USART1 + config STM32_T5UID1_SERIAL_USART2_PA3_PA2 + bool "USART2 (on PA3/PA2)" + depends on !STM32_SERIAL_USART2_USED + select STM32_T5UID1_SERIAL_USART2 + config STM32_T5UID1_SERIAL_USART2_PA15_PA14 + bool "USART2 (on PA15/PA14)" if MACH_STM32F0 + depends on !STM32_SERIAL_USART2_USED + select STM32_T5UID1_SERIAL_USART2 + config STM32_T5UID1_SERIAL_USART2_PD6_PD5 + bool "USART2 (on PD6/PD5)" if !MACH_STM32F0 + depends on !STM32_SERIAL_USART2_USED + select STM32_T5UID1_SERIAL_USART2 + config STM32_T5UID1_SERIAL_USART3_PB11_PB10 + bool "USART3 (on PB11/PB10)" if !MACH_STM32F0 && !MACH_STM32F401 + depends on !STM32_SERIAL_USART3_USED + select STM32_T5UID1_SERIAL_USART3 + config STM32_T5UID1_SERIAL_USART3_PD9_PD8 + bool "USART3 (on PD9/PD8)" if !MACH_STM32F0 && !MACH_STM32F401 + depends on !STM32_SERIAL_USART3_USED + select STM32_T5UID1_SERIAL_USART3 + config STM32_T5UID1_SERIAL_UART4_PA1_PA0 + bool "UART4 (on PA1/PA0)" if MACH_STM32H7 + depends on !STM32_SERIAL_UART4_USED + select STM32_T5UID1_SERIAL_UART4 endchoice - -config T5UID1_SERIAL_PORT - int - default 3 if STM32_T5UID1_SERIAL_USART3 || STM32_T5UID1_SERIAL_USART3_ALT - default 2 if STM32_T5UID1_SERIAL_USART2 || STM32_T5UID1_SERIAL_USART2_ALT - default 1 if STM32_T5UID1_SERIAL_USART1 - default 2 if !STM32_SERIAL_USART2 && !STM32_SERIAL_USART2_ALT - default 1 diff --git a/src/stm32/t5uid1/Makefile b/src/stm32/t5uid1/Makefile index f728fc8e..07f228b2 100644 --- a/src/stm32/t5uid1/Makefile +++ b/src/stm32/t5uid1/Makefile @@ -2,6 +2,4 @@ dirs-$(CONFIG_T5UID1_SERIAL) += src/stm32/t5uid1 src/generic/t5uid1 -t5uid1-src-y := stm32/t5uid1/serial.c -t5uid1-src-$(CONFIG_MACH_STM32F0) := stm32/t5uid1/stm32f0_serial.c -src-$(CONFIG_T5UID1_SERIAL) += $(t5uid1-src-y) generic/t5uid1/serial_irq.c +src-$(CONFIG_T5UID1_SERIAL) += stm32/t5uid1/serial.c generic/t5uid1/serial_irq.c diff --git a/src/stm32/t5uid1/serial.c b/src/stm32/t5uid1/serial.c index 8e1686ef..93c3d7ba 100644 --- a/src/stm32/t5uid1/serial.c +++ b/src/stm32/t5uid1/serial.c @@ -10,60 +10,94 @@ #include "command.h" // DECL_CONSTANT_STR #include "../internal.h" // enable_pclock -#if CONFIG_SERIAL && CONFIG_T5UID1_SERIAL_PORT == CONFIG_SERIAL_PORT - #error "The serial port selected for the T5UID1 screen is already used" +#if CONFIG_MACH_STM32F0 + #include "stm32f0_serial.h" +#elif CONFIG_MACH_STM32G0 + #include "stm32g0_serial.h" +#elif CONFIG_MACH_STM32H7 + #include "stm32h7_serial.h" +#else + #include "stm32_serial.h" #endif -// Select the configured serial port -#if CONFIG_T5UID1_SERIAL_PORT == 1 - DECL_CONSTANT_STR("RESERVE_PINS_t5uid1", "PA10,PA9"); +#if CONFIG_STM32_T5UID1_SERIAL_USART1_PA10_PA9 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9"); #define GPIO_Rx GPIO('A', 10) #define GPIO_Tx GPIO('A', 9) #define USARTx USART1 #define USARTx_IRQn USART1_IRQn -#elif CONFIG_T5UID1_SERIAL_PORT == 2 - DECL_CONSTANT_STR("RESERVE_PINS_t5uid1", "PA3,PA2"); + #define USARTx_FUNCTION USART1_PA10_PA9_FUNCTION +#elif CONFIG_STM32_T5UID1_SERIAL_USART1_PB7_PB6 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB7,PB6"); + #define GPIO_Rx GPIO('B', 7) + #define GPIO_Tx GPIO('B', 6) + #define USARTx USART1 + #define USARTx_IRQn USART1_IRQn + #define USARTx_FUNCTION USART1_PB7_PB6_FUNCTION +#elif CONFIG_STM32_T5UID1_SERIAL_USART2_PA3_PA2 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2"); #define GPIO_Rx GPIO('A', 3) #define GPIO_Tx GPIO('A', 2) #define USARTx USART2 #define USARTx_IRQn USART2_IRQn -#elif CONFIG_T5UID1_SERIAL_PORT == 3 - #if CONFIG_T5UID1_STM32_SERIAL_USART3_ALT - DECL_CONSTANT_STR("RESERVE_PINS_t5uid1", "PD9,PD8"); - #define GPIO_Rx GPIO('D', 9) - #define GPIO_Tx GPIO('D', 8) - #else - DECL_CONSTANT_STR("RESERVE_PINS_t5uid1", "PB11,PB10"); - #define GPIO_Rx GPIO('B', 11) - #define GPIO_Tx GPIO('B', 10) - #endif + #define USARTx_FUNCTION USART2_PA3_PA2_FUNCTION +#elif CONFIG_STM32_T5UID1_SERIAL_USART2_PA15_PA14 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14"); + #define GPIO_Rx GPIO('A', 15) + #define GPIO_Tx GPIO('A', 14) + #define USARTx USART2 + #define USARTx_IRQn USART2_IRQn + #define USARTx_FUNCTION USART2_PA15_PA14_FUNCTION +#elif CONFIG_STM32_T5UID1_SERIAL_USART2_PD6_PD5 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD6,PD5"); + #define GPIO_Rx GPIO('D', 6) + #define GPIO_Tx GPIO('D', 5) + #define USARTx USART2 + #define USARTx_IRQn USART2_IRQn + #define USARTx_FUNCTION USART2_PD6_PD5_FUNCTION +#elif CONFIG_STM32_T5UID1_SERIAL_USART3_PB11_PB10 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10"); + #define GPIO_Rx GPIO('B', 11) + #define GPIO_Tx GPIO('B', 10) #define USARTx USART3 #define USARTx_IRQn USART3_IRQn + #define USARTx_FUNCTION USART3_PB11_PB10_FUNCTION +#elif CONFIG_STM32_T5UID1_SERIAL_USART3_PD9_PD8 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8"); + #define GPIO_Rx GPIO('D', 9) + #define GPIO_Tx GPIO('D', 8) + #define USARTx USART3 + #define USARTx_IRQn USART3_IRQn + #define USARTx_FUNCTION USART3_PD9_PD8_FUNCTION +#elif CONFIG_STM32_T5UID1_SERIAL_UART4_PA1_PA0 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA1,PA0"); + #define GPIO_Rx GPIO('A', 1) + #define GPIO_Tx GPIO('A', 0) + #define USARTx UART4 + #define USARTx_IRQn UART4_IRQn + #define USARTx_FUNCTION UART4_PA1_PA0_FUNCTION #endif -#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ - | USART_CR1_RXNEIE) - void t5uid1_USARTx_IRQHandler(void) { - uint32_t sr = USARTx->SR; - if (sr & (USART_SR_RXNE | USART_SR_ORE)) - t5uid1_rx_byte(USARTx->DR); - if (sr & USART_SR_TXE && USARTx->CR1 & USART_CR1_TXEIE) { + uint32_t isr = USART_ISR(USARTx); + if (isr & ISR_RX) + t5uid1_rx_byte(USART_RDR(USARTx)); + if (isr & ISR_TXEN && USART_CR1(USARTx) & CR1_TXEN) { uint8_t data; int ret = t5uid1_get_tx_byte(&data); if (ret) - USARTx->CR1 = CR1_FLAGS; + USART_CR1(USARTx) = CR1_BASE; else - USARTx->DR = data; + USART_TDR(USARTx) = data; } } void t5uid1_enable_tx_irq(void) { - USARTx->CR1 = CR1_FLAGS | USART_CR1_TXEIE; + USART_CR1(USARTx) = CR1_BASE | CR1_TXEN; } void @@ -73,11 +107,10 @@ t5uid1_init(uint32_t baud) uint32_t pclk = get_pclock_frequency((uint32_t)USARTx); uint32_t div = DIV_ROUND_CLOSEST(pclk, baud); - USARTx->BRR = (((div / 16) << USART_BRR_DIV_Mantissa_Pos) - | ((div % 16) << USART_BRR_DIV_Fraction_Pos)); - USARTx->CR1 = CR1_FLAGS; + USART_BRR(USARTx) = BRR_VAL(div); + USART_CR1(USARTx) = CR1_BASE; armcm_enable_irq(t5uid1_USARTx_IRQHandler, USARTx_IRQn, 0); - gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(7), 1); - gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(7), 0); + gpio_peripheral(GPIO_Rx, USARTx_FUNCTION, 1); + gpio_peripheral(GPIO_Tx, USARTx_FUNCTION, 0); } diff --git a/src/stm32/t5uid1/stm32_serial.h b/src/stm32/t5uid1/stm32_serial.h new file mode 100644 index 00000000..2be4ed4d --- /dev/null +++ b/src/stm32/t5uid1/stm32_serial.h @@ -0,0 +1,29 @@ +#ifndef __STM32_T5UID1_STM32_SERIAL_H +#define __STM32_T5UID1_STM32_SERIAL_H + +#include "../internal.h" + +#define USART_ISR(usart) (usart)->SR +#define USART_RDR(usart) (usart)->DR +#define USART_TDR(usart) (usart)->DR +#define USART_CR1(usart) (usart)->CR1 +#define USART_BRR(usart) (usart)->BRR + +#define ISR_RX (USART_SR_RXNE | USART_SR_ORE) +#define ISR_TXEN USART_SR_TXE + +#define CR1_BASE (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ + | USART_CR1_RXNEIE) +#define CR1_TXEN USART_CR1_TXEIE + +#define BRR_VAL(div) ((((div) / 16) << USART_BRR_DIV_Mantissa_Pos) \ + | (((div) % 16) << USART_BRR_DIV_Fraction_Pos)) + +#define USART1_PA10_PA9_FUNCTION GPIO_FUNCTION(7) +#define USART1_PB7_PB6_FUNCTION GPIO_FUNCTION(7) +#define USART2_PA3_PA2_FUNCTION GPIO_FUNCTION(7) +#define USART2_PD6_PD5_FUNCTION GPIO_FUNCTION(7) +#define USART3_PB11_PB10_FUNCTION GPIO_FUNCTION(7) +#define USART3_PD9_PD8_FUNCTION GPIO_FUNCTION(7) + +#endif // stm32_serial.h diff --git a/src/stm32/t5uid1/stm32f0_serial.c b/src/stm32/t5uid1/stm32f0_serial.c deleted file mode 100644 index 73cf0e03..00000000 --- a/src/stm32/t5uid1/stm32f0_serial.c +++ /dev/null @@ -1,77 +0,0 @@ -// STM32F0 serial -// -// Copyright (C) 2019 Kevin O'Connor -// -// This file may be distributed under the terms of the GNU GPLv3 license. - -#include "autoconf.h" // CONFIG_T5UID1_SERIAL_PORT -#include "board/armcm_boot.h" // armcm_enable_irq -#include "board/t5uid1/serial_irq.h" // t5uid1_rx_byte -#include "command.h" // DECL_CONSTANT_STR -#include "../internal.h" // enable_pclock - -#if CONFIG_SERIAL && CONFIG_T5UID1_SERIAL_PORT == CONFIG_SERIAL_PORT - #error "The serial port selected for the T5UID1 screen is already used" -#endif - -// Select the configured serial port -#if CONFIG_T5UID1_SERIAL_PORT == 1 - DECL_CONSTANT_STR("RESERVE_PINS_t5uid1", "PA10,PA9"); - #define GPIO_Rx GPIO('A', 10) - #define GPIO_Tx GPIO('A', 9) - #define USARTx USART1 - #define USARTx_IRQn USART1_IRQn -#elif CONFIG_T5UID1_SERIAL_PORT == 2 - #if CONFIG_T5UID1_STM32_SERIAL_USART2_ALT - DECL_CONSTANT_STR("RESERVE_PINS_t5uid1", "PA15,PA14"); - #define GPIO_Rx GPIO('A', 15) - #define GPIO_Tx GPIO('A', 14) - #else - DECL_CONSTANT_STR("RESERVE_PINS_t5uid1", "PA3,PA2"); - #define GPIO_Rx GPIO('A', 3) - #define GPIO_Tx GPIO('A', 2) - #endif - #define USARTx USART2 - #define USARTx_IRQn USART2_IRQn -#endif - -#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ - | USART_CR1_RXNEIE) - -void -t5uid1_USARTx_IRQHandler(void) -{ - uint32_t sr = USARTx->ISR; - if (sr & (USART_ISR_RXNE | USART_ISR_ORE)) - t5uid1_rx_byte(USARTx->RDR); - if (sr & USART_ISR_TXE && USARTx->CR1 & USART_CR1_TXEIE) { - uint8_t data; - int ret = t5uid1_get_tx_byte(&data); - if (ret) - USARTx->CR1 = CR1_FLAGS; - else - USARTx->TDR = data; - } -} - -void -t5uid1_enable_tx_irq(void) -{ - USARTx->CR1 = CR1_FLAGS | USART_CR1_TXEIE; -} - -void -t5uid1_init(uint32_t baud) -{ - enable_pclock((uint32_t)USARTx); - - uint32_t pclk = get_pclock_frequency((uint32_t)USARTx); - uint32_t div = DIV_ROUND_CLOSEST(pclk, baud); - USARTx->BRR = (((div / 16) << USART_BRR_DIV_MANTISSA_Pos) - | ((div % 16) << USART_BRR_DIV_FRACTION_Pos)); - USARTx->CR1 = CR1_FLAGS; - armcm_enable_irq(t5uid1_USARTx_IRQHandler, USARTx_IRQn, 0); - - gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(1), 1); - gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(1), 0); -} diff --git a/src/stm32/t5uid1/stm32f0_serial.h b/src/stm32/t5uid1/stm32f0_serial.h new file mode 100644 index 00000000..32f855a4 --- /dev/null +++ b/src/stm32/t5uid1/stm32f0_serial.h @@ -0,0 +1,27 @@ +#ifndef __STM32_T5UID1_STM32F0_SERIAL_H +#define __STM32_T5UID1_STM32F0_SERIAL_H + +#include "../internal.h" + +#define USART_ISR(usart) (usart)->ISR +#define USART_RDR(usart) (usart)->RDR +#define USART_TDR(usart) (usart)->TDR +#define USART_CR1(usart) (usart)->CR1 +#define USART_BRR(usart) (usart)->BRR + +#define ISR_RX (USART_ISR_RXNE | USART_ISR_ORE) +#define ISR_TXEN USART_ISR_TXE + +#define CR1_BASE (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ + | USART_CR1_RXNEIE) +#define CR1_TXEN USART_CR1_TXEIE + +#define BRR_VAL(div) ((((div) / 16) << USART_BRR_DIV_MANTISSA_Pos) \ + | (((div) % 16) << USART_BRR_DIV_FRACTION_Pos)) + +#define USART1_PA10_PA9_FUNCTION GPIO_FUNCTION(1) +#define USART1_PB7_PB6_FUNCTION GPIO_FUNCTION(0) +#define USART2_PA3_PA2_FUNCTION GPIO_FUNCTION(1) +#define USART2_PA15_PA14_FUNCTION GPIO_FUNCTION(1) + +#endif // stm32f0_serial.h diff --git a/src/stm32/t5uid1/stm32g0_serial.h b/src/stm32/t5uid1/stm32g0_serial.h new file mode 100644 index 00000000..b6521eb6 --- /dev/null +++ b/src/stm32/t5uid1/stm32g0_serial.h @@ -0,0 +1,33 @@ +#ifndef __STM32_T5UID1_STM32G0_SERIAL_H +#define __STM32_T5UID1_STM32G0_SERIAL_H + +#include "../internal.h" + +#define USART_ISR(usart) (usart)->ISR +#define USART_RDR(usart) (usart)->RDR +#define USART_TDR(usart) (usart)->TDR +#define USART_CR1(usart) (usart)->CR1 +#define USART_BRR(usart) (usart)->BRR + +#define ISR_RX (USART_ISR_RXNE_RXFNE | USART_ISR_ORE) +#define ISR_TXEN USART_ISR_TXE_TXFNF + +#define CR1_BASE (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ + | USART_CR1_RXNEIE_RXFNEIE) +#define CR1_TXEN USART_CR1_TXEIE_TXFNFIE + +#define BRR_VAL(div) ((((div) / 16) << 4) \ + | ((div) % 16)) + +#define USART1_PA10_PA9_FUNCTION GPIO_FUNCTION(1) +#define USART1_PB7_PB6_FUNCTION GPIO_FUNCTION(0) +#define USART2_PA3_PA2_FUNCTION GPIO_FUNCTION(1) +#define USART2_PA15_PA14_FUNCTION GPIO_FUNCTION(1) +#define USART2_PD6_PD5_FUNCTION GPIO_FUNCTION(0) +#define USART3_PB11_PB10_FUNCTION GPIO_FUNCTION(4) +#define USART3_PD9_PD8_FUNCTION GPIO_FUNCTION(0) + +#define USART2_IRQn USART2_LPUART2_IRQn +#define USART3_IRQn USART3_4_5_6_LPUART1_IRQn + +#endif // stm32g0_serial.h diff --git a/src/stm32/t5uid1/stm32h7_serial.h b/src/stm32/t5uid1/stm32h7_serial.h new file mode 100644 index 00000000..ca386a4a --- /dev/null +++ b/src/stm32/t5uid1/stm32h7_serial.h @@ -0,0 +1,31 @@ +#ifndef __STM32_T5UID1_STM32H7_SERIAL_H +#define __STM32_T5UID1_STM32H7_SERIAL_H + +#include "../internal.h" + +#define USART_ISR(usart) (usart)->ISR +#define USART_RDR(usart) (usart)->RDR +#define USART_TDR(usart) (usart)->TDR +#define USART_CR1(usart) (usart)->CR1 +#define USART_BRR(usart) (usart)->BRR + +#define ISR_RX (USART_ISR_RXNE_RXFNE | USART_ISR_ORE) +#define ISR_TXEN USART_ISR_TXE_TXFNF + +#define CR1_BASE (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ + | USART_CR1_RXNEIE) +#define CR1_TXEN USART_CR1_TXEIE + +#define BRR_VAL(div) ((((div) / 16) << USART_BRR_DIV_MANTISSA_Pos) \ + | (((div) % 16) << USART_BRR_DIV_FRACTION_Pos)) + +#define USART1_PA10_PA9_FUNCTION GPIO_FUNCTION(7) +#define USART1_PB7_PB6_FUNCTION GPIO_FUNCTION(7) +#define USART2_PA3_PA2_FUNCTION GPIO_FUNCTION(7) +#define USART2_PA15_PA14_FUNCTION GPIO_FUNCTION(7) +#define USART2_PD6_PD5_FUNCTION GPIO_FUNCTION(7) +#define USART3_PB11_PB10_FUNCTION GPIO_FUNCTION(7) +#define USART3_PD9_PD8_FUNCTION GPIO_FUNCTION(7) +#define UART4_PA1_PA0_FUNCTION GPIO_FUNCTION(8) + +#endif // stm32h7_serial.h