mirror of https://github.com/Desuuuu/klipper.git
rp2040: implement I2C
This implements I2C for the rp2040 target. All output groupings of both I2C blocks are available for use. Signed-off-by: Lasse Dalegaard <dalegaard@gmail.com>
This commit is contained in:
Lasse Dalegaard
KevinOConnor
parent
6e6ad7b520
commit
090fcf928f
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@ -8,6 +8,7 @@ config RP2040_SELECT
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select HAVE_GPIO
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select HAVE_GPIO
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select HAVE_GPIO_ADC
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select HAVE_GPIO_ADC
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select HAVE_GPIO_SPI
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select HAVE_GPIO_SPI
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select HAVE_GPIO_I2C
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select HAVE_GPIO_BITBANGING
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select HAVE_GPIO_BITBANGING
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select HAVE_STRICT_TIMING
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select HAVE_STRICT_TIMING
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select HAVE_CHIPID
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select HAVE_CHIPID
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@ -21,6 +21,7 @@ src-$(CONFIG_USBSERIAL) += rp2040/chipid.c
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src-$(CONFIG_SERIAL) += rp2040/serial.c generic/serial_irq.c
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src-$(CONFIG_SERIAL) += rp2040/serial.c generic/serial_irq.c
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src-$(CONFIG_HAVE_GPIO_HARD_PWM) += rp2040/hard_pwm.c
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src-$(CONFIG_HAVE_GPIO_HARD_PWM) += rp2040/hard_pwm.c
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src-$(CONFIG_HAVE_GPIO_SPI) += rp2040/spi.c
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src-$(CONFIG_HAVE_GPIO_SPI) += rp2040/spi.c
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src-$(CONFIG_HAVE_GPIO_I2C) += rp2040/i2c.c
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# rp2040 stage2 building
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# rp2040 stage2 building
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$(OUT)stage2.o: lib/rp2040/boot_stage2/boot2_w25q080.S
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$(OUT)stage2.o: lib/rp2040/boot_stage2/boot2_w25q080.S
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@ -44,4 +44,14 @@ void spi_prepare(struct spi_config config);
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void spi_transfer(struct spi_config config, uint8_t receive_data
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void spi_transfer(struct spi_config config, uint8_t receive_data
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, uint8_t len, uint8_t *data);
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, uint8_t len, uint8_t *data);
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struct i2c_config {
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void *i2c;
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uint8_t addr;
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};
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struct i2c_config i2c_setup(uint32_t bus, uint32_t rate, uint8_t addr);
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void i2c_write(struct i2c_config config, uint8_t write_len, uint8_t *write);
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void i2c_read(struct i2c_config config, uint8_t reg_len, uint8_t *reg
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, uint8_t read_len, uint8_t *read);
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#endif // gpio.h
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#endif // gpio.h
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@ -0,0 +1,215 @@
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// I2C functions for rp2040
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//
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// Copyright (C) 2022 Lasse Dalegaard <dalegaard@gmail.com>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "board/misc.h" // timer_is_before
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#include "gpio.h" // i2c_setup, i2c_read, i2c_write
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#include "command.h" // shutdown
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#include "sched.h" // sched_shutdown
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#include "internal.h" // pclock, gpio_peripheral
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#include "hardware/regs/resets.h" // RESETS_RESET_I2C*_BITS
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#include "hardware/structs/i2c.h"
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struct i2c_info {
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i2c_hw_t *i2c;
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uint8_t sda_pin, scl_pin, pclk;
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};
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DECL_ENUMERATION("i2c_bus", "i2c0a", 0);
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DECL_ENUMERATION("i2c_bus", "i2c0b", 1);
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DECL_ENUMERATION("i2c_bus", "i2c0c", 2);
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DECL_ENUMERATION("i2c_bus", "i2c0d", 3);
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DECL_ENUMERATION("i2c_bus", "i2c0e", 4);
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DECL_ENUMERATION("i2c_bus", "i2c0f", 5);
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DECL_ENUMERATION("i2c_bus", "i2c0g", 6);
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DECL_ENUMERATION("i2c_bus", "i2c0h", 7);
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DECL_ENUMERATION("i2c_bus", "i2c1a", 8);
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DECL_ENUMERATION("i2c_bus", "i2c1b", 9);
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DECL_ENUMERATION("i2c_bus", "i2c1c", 10);
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DECL_ENUMERATION("i2c_bus", "i2c1d", 11);
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DECL_ENUMERATION("i2c_bus", "i2c1e", 12);
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DECL_ENUMERATION("i2c_bus", "i2c1f", 13);
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DECL_ENUMERATION("i2c_bus", "i2c1g", 14);
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DECL_CONSTANT_STR("BUS_PINS_i2c0a", "gpio0,gpio1");
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DECL_CONSTANT_STR("BUS_PINS_i2c0b", "gpio4,gpio5");
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DECL_CONSTANT_STR("BUS_PINS_i2c0c", "gpio8,gpio9");
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DECL_CONSTANT_STR("BUS_PINS_i2c0d", "gpio12,gpio13");
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DECL_CONSTANT_STR("BUS_PINS_i2c0e", "gpio16,gpio17");
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DECL_CONSTANT_STR("BUS_PINS_i2c0f", "gpio20,gpio21");
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DECL_CONSTANT_STR("BUS_PINS_i2c0g", "gpio24,gpio25");
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DECL_CONSTANT_STR("BUS_PINS_i2c0h", "gpio28,gpio29");
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DECL_CONSTANT_STR("BUS_PINS_i2c1a", "gpio2,gpio3");
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DECL_CONSTANT_STR("BUS_PINS_i2c1b", "gpio6,gpio7");
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DECL_CONSTANT_STR("BUS_PINS_i2c1c", "gpio10,gpio11");
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DECL_CONSTANT_STR("BUS_PINS_i2c1d", "gpio14,gpio15");
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DECL_CONSTANT_STR("BUS_PINS_i2c1e", "gpio18,gpio19");
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DECL_CONSTANT_STR("BUS_PINS_i2c1f", "gpio22,gpio23");
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DECL_CONSTANT_STR("BUS_PINS_i2c1g", "gpio26,gpio27");
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static const struct i2c_info i2c_bus[] = {
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{ i2c0_hw, 0, 1, RESETS_RESET_I2C0_BITS },
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{ i2c0_hw, 4, 5, RESETS_RESET_I2C0_BITS },
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{ i2c0_hw, 8, 9, RESETS_RESET_I2C0_BITS },
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{ i2c0_hw, 12, 13, RESETS_RESET_I2C0_BITS },
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{ i2c0_hw, 16, 17, RESETS_RESET_I2C0_BITS },
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{ i2c0_hw, 20, 21, RESETS_RESET_I2C0_BITS },
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{ i2c0_hw, 24, 25, RESETS_RESET_I2C0_BITS },
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{ i2c0_hw, 28, 29, RESETS_RESET_I2C0_BITS },
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{ i2c1_hw, 2, 3, RESETS_RESET_I2C1_BITS },
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{ i2c1_hw, 6, 7, RESETS_RESET_I2C1_BITS },
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{ i2c1_hw, 10, 11, RESETS_RESET_I2C1_BITS },
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{ i2c1_hw, 14, 15, RESETS_RESET_I2C1_BITS },
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{ i2c1_hw, 18, 19, RESETS_RESET_I2C1_BITS },
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{ i2c1_hw, 22, 23, RESETS_RESET_I2C1_BITS },
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{ i2c1_hw, 26, 27, RESETS_RESET_I2C1_BITS },
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};
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struct i2c_config
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i2c_setup(uint32_t bus, uint32_t rate, uint8_t addr)
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{
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if (bus > ARRAY_SIZE(i2c_bus))
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shutdown("Invalid i2c bus");
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const struct i2c_info *info = &i2c_bus[bus];
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gpio_peripheral(info->sda_pin, 3, 0);
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gpio_peripheral(info->scl_pin, 3, 0);
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if (!is_enabled_pclock(info->pclk)) {
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enable_pclock(info->pclk);
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i2c_hw_t *i2c = info->i2c;
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i2c->enable = 0;
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// We set up the bus in 400 kHz mode, but then set timings afterwards
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// to match either 100k or 400k mode. This simplifies the setup.
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i2c->con = I2C_IC_CON_SPEED_VALUE_FAST << I2C_IC_CON_SPEED_LSB
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| I2C_IC_CON_MASTER_MODE_BITS
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| I2C_IC_CON_IC_SLAVE_DISABLE_BITS
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| I2C_IC_CON_IC_RESTART_EN_BITS;
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i2c->tx_tl = 0;
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i2c->rx_tl = 0;
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uint32_t pclk = get_pclock_frequency(info->pclk);
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// See `i2c_set_baudrate` in the Pico SDK `hardware_i2c/i2c.c` file
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// for details on the calculations here.
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if (rate > 1000000)
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rate = 1000000; // Clamp the rate to 1Mbps
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uint32_t period = (pclk + rate / 2) / rate;
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uint32_t lcnt = period * 3 / 5;
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uint32_t hcnt = period - lcnt;
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uint32_t sda_tx_hold_count = ((pclk * 3) / 10000000) + 1;
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i2c->fs_scl_hcnt = hcnt;
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i2c->fs_scl_lcnt = lcnt;
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i2c->fs_spklen = lcnt < 16 ? 1 : lcnt / 16;
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hw_write_masked(&i2c->sda_hold,
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sda_tx_hold_count << I2C_IC_SDA_HOLD_IC_SDA_TX_HOLD_LSB,
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I2C_IC_SDA_HOLD_IC_SDA_TX_HOLD_BITS);
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}
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return (struct i2c_config){ .i2c=info->i2c, .addr=addr };
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}
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static void
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i2c_start(i2c_hw_t *i2c, uint8_t addr)
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{
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i2c->enable = 0;
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i2c->tar = addr;
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i2c->enable = 1;
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}
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static void
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i2c_stop(i2c_hw_t *i2c)
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{
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i2c->enable = 0;
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}
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static void
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i2c_do_write(i2c_hw_t *i2c, uint8_t addr, uint8_t write_len, uint8_t *write
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, uint8_t send_stop, uint32_t timeout)
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{
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for (int i = 0; i < write_len; i++) {
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int first = i == 0;
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int last = send_stop && (i == write_len - 1);
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// Wait until there's a spot in the TX FIFO
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while (i2c->txflr == 16) {
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if (!timer_is_before(timer_read_time(), timeout))
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shutdown("i2c timeout");
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}
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i2c->data_cmd = first << I2C_IC_DATA_CMD_RESTART_LSB
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| last << I2C_IC_DATA_CMD_STOP_LSB
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| write[i];
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}
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if (!send_stop)
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return;
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// Drain the transmit buffer
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while (i2c->txflr != 0) {
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if (!timer_is_before(timer_read_time(), timeout))
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shutdown("i2c timeout");
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}
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}
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static void
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i2c_do_read(i2c_hw_t *i2c, uint8_t addr, uint8_t read_len, uint8_t *read
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, uint32_t timeout)
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{
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int have_read = 0;
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int to_send = read_len;
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while (have_read < read_len) {
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if (!timer_is_before(timer_read_time(), timeout))
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shutdown("i2c timeout");
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if (to_send > 0 && i2c->txflr < 16) {
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int first = to_send == read_len;
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int last = to_send == 1;
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// Put a read command in the TX FIFO
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i2c->data_cmd = first << I2C_IC_DATA_CMD_RESTART_LSB
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| last << I2C_IC_DATA_CMD_STOP_LSB
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| I2C_IC_DATA_CMD_CMD_BITS;
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to_send--;
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}
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if (have_read < read_len && i2c->rxflr > 0) {
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*read++ = i2c->data_cmd & 0xFF;
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have_read++;
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}
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}
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}
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void
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i2c_write(struct i2c_config config, uint8_t write_len, uint8_t *write)
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{
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i2c_hw_t *i2c = (i2c_hw_t*)config.i2c;
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uint32_t timeout = timer_read_time() + timer_from_us(5000);
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i2c_start(i2c, config.addr);
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i2c_do_write(i2c, config.addr, write_len, write, 1, timeout);
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i2c_stop(i2c);
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}
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void
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i2c_read(struct i2c_config config, uint8_t reg_len, uint8_t *reg
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, uint8_t read_len, uint8_t *read)
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{
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i2c_hw_t *i2c = (i2c_hw_t*)config.i2c;
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uint32_t timeout = timer_read_time() + timer_from_us(5000);
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i2c_start(i2c, config.addr);
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if (reg_len != 0)
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i2c_do_write(i2c, config.addr, reg_len, reg, 0, timeout);
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i2c_do_read(i2c, config.addr, read_len, read, timeout);
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i2c_stop(i2c);
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}
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