2018-12-26 21:46:25 +01:00
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--- a/lib/sam4e/gcc/gcc/startup_sam4e.c
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+++ b/lib/sam4e/gcc/gcc/startup_sam4e.c
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2018-08-07 01:03:54 +02:00
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@@ -104,7 +105,7 @@ void GMAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
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void UART1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
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/* Exception Table */
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-__attribute__ ((section(".vectors")))
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+__attribute__ ((section(".vectors"))) __attribute__((externally_visible))
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const DeviceVectors exception_table = {
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/* Configure Initial Stack Pointer, using linker-generated symbols */
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@@ -135,6 +136,7 @@ const DeviceVectors exception_table = {
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(void*) PMC_Handler, /* 5 Power Management Controller */
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(void*) EFC_Handler, /* 6 Enhanced Embedded Flash Controller */
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(void*) UART0_Handler, /* 7 UART 0 */
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+ (void*) Dummy_Handler, /* 8 Dummy */
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(void*) PIOA_Handler, /* 9 Parallel I/O Controller A */
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(void*) PIOB_Handler, /* 10 Parallel I/O Controller B */
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(void*) PIOC_Handler, /* 11 Parallel I/O Controller C */
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@@ -166,6 +168,10 @@ const DeviceVectors exception_table = {
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(void*) CAN0_Handler, /* 37 CAN0 */
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(void*) CAN1_Handler, /* 38 CAN1 */
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(void*) AES_Handler, /* 39 AES */
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+ (void*) Dummy_Handler, /* 40 Dummy */
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+ (void*) Dummy_Handler, /* 41 Dummy */
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+ (void*) Dummy_Handler, /* 42 Dummy */
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+ (void*) Dummy_Handler, /* 43 Dummy */
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(void*) GMAC_Handler, /* 44 EMAC */
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(void*) UART1_Handler /* 45 UART */
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};
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@@ -198,7 +204,7 @@ void Reset_Handler(void)
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SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
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/* Initialize the C library */
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- __libc_init_array();
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+ // __libc_init_array();
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/* Branch to main function */
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main();
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2018-12-26 21:46:25 +01:00
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diff --git a/lib/sam4e/include/component/afec.h b/lib/sam4e/include/component/afec.h
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2018-08-07 01:03:54 +02:00
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index 34c4e61d..9a4f8f96 100644
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2018-12-26 21:46:25 +01:00
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--- a/lib/sam4e/include/component/afec.h
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+++ b/lib/sam4e/include/component/afec.h
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2018-08-07 01:03:54 +02:00
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@@ -59,9 +59,9 @@ typedef struct {
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RoReg Reserved2[1];
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RwReg AFE_CDOR; /**< \brief (Afec Offset: 0x5C) Channel DC Offset Register */
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RwReg AFE_DIFFR; /**< \brief (Afec Offset: 0x60) Channel Differential Register */
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- RoReg AFE_CSELR; /**< \brief (Afec Offset: 0x64) Channel Register Selection */
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+ RwReg AFE_CSELR; /**< \brief (Afec Offset: 0x64) Channel Register Selection */
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RoReg AFE_CDR; /**< \brief (Afec Offset: 0x68) Channel Data Register */
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- RoReg AFE_COCR; /**< \brief (Afec Offset: 0x6C) Channel Offset Compensation Register */
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+ RwReg AFE_COCR; /**< \brief (Afec Offset: 0x6C) Channel Offset Compensation Register */
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RwReg AFE_TEMPMR; /**< \brief (Afec Offset: 0x70) Temperature Sensor Mode Register */
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RwReg AFE_TEMPCWR; /**< \brief (Afec Offset: 0x74) Temperature Compare Window Register */
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RoReg Reserved3[7];
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